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Samudra,Ganesh S

rp00141

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Full Name
Samudra,Ganesh S
Variants
Samudra, G.G.
SAMUDRA, GANESH SHANKAR
Samudra', G.S.
Samudra, Ganesh S.
Samudra, Ganesh Shankar
Shankar Samudra, Ganesh
Samudra, G.S.
Samudra, Ganesh
Samudra, G.
 
Main Affiliation
 
Faculty
 
Email
eleshanr@nus.edu.sg
 

Publications

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Author:  Samudra, G.
Department:  ELECTRICAL AND COMPUTER ENGINEERING
Type:  Conference Paper

Results 61-80 of 116 (Search time: 0.007 seconds).

Issue DateTitleAuthor(s)
612005New insights in hf based high-k gate dielectrics in mosfetsLi, M.-F. ; Zhu, C. ; Shen, C.; Yu, X.F.; Wang, X.P.; Feng, Y.P. ; Du, A.Y.; Yeo, Y.C. ; Samudra, G. ; Chin, A. ; Kwong, D.L. 
622011New Tellurium implant and segregation for contact resistance reduction and single metallic silicide technology for independent contact resistance optimization in n- and p-FinFETsKoh, S.-M.; Kong, E.Y.J.; Liu, B.; Ng, C.-M.; Liu, P.; Mo, Z.-Q.; Leong, K.-C.; Samudra, G.S. ; Yeo, Y.-C. 
632008Novel and cost-efficient single metallic silicide integration solution with dual Schottky-barrier achieved by aluminum inter-diffusion for FinFET CMOS technology with enhanced performanceLee, R.T.-P. ; Koh, A.T.-Y.; Fang, W.-W.; Tan, K.-M.; Lim, A.E.-J.; Liow, T.-Y.; Chow, S.-Y.; Yong, A.M.; Hoong, S.W.; Lo, G.-Q.; Samudra, G.S. ; Chi, D.-Z.; Yeo, Y.-C. 
642007Novel epitaxial nickel aluminide-silicide with low Schottky-Barrier and series resistance for enhanced performance of dopant-segregated source/drain N-channel MuGFETsLee, R.T.P. ; Liow, T.-Y.; Tan, K.-M.; Lim, A.E.-J.; Ho, C.-S.; Hoe, K.-M.; Lai, M.Y.; Osipowicz, T. ; Lo, G.-Q.; Samudra, G. ; Chi, D.-Z.; Yeo, Y.-C. 
652006Novel nickel-alloy suicides for source/drain contact resistance reduction in N-channel multiple-gate transistors with sub-35nm gate lengthLee, R.T.P. ; Liow, T.-Y.; Tan, K.-M.; Lim, A.E.-J.; Wong, H.-S.; Lim, P.-C.; Lai, D.M.Y.; Lo, G.-Q.; Tung, C.-H.; Samudra, G. ; Chi, D.-Z.; Yeo, Y.-C. 
662011Novel technique to engineer aluminum profile at nickel-silicide/silicon: carbon interface for contact resistance reduction, and integration in strained N-MOSFETs with silicon-carbon stressorsKoh, S.-M.; Zhou, Q. ; Thanigaivelan, T.; Henry, T.; Samudra, G.S. ; Yeo, Y.C. 
672011Novel tellurium co-implantation and segregation for effective source/drain contact resistance reduction and gate work function modulation in n-FinFETsKoh, S.-M.; Ding, Y.; Guo, C.; Leong, K.-C.; Samudra, G.S. ; Yeo, Y.-C. 
682013Numerical analysis of p+ emitters passivated by a PECVD AlO x/SiNx stackMa, F.-J. ; Duttagupta, S.; Peters, M.; Samudra, G.S. ; Aberle, A.G. ; Hoex, B.
692013Numerical modelling of silicon p+ emitters passivated by a PECVD AlOx/SiNx stackMa, F.-J.; Duttagupta, S.; Peters, M.; Samudra, G.S. ; Aberle, A.G. ; Hoex, B. 
702008On the impact ionization in double-gate MOSFET using full band monte carlo methodBai, P.; Chang, K.; Kajen, R.S.; Li, E.; Samudra, G. 
712007On the performance limit of impact-ionization transistorsShen, C.; Lin, J.-Q.; Toh, E.-H.; Chang, K.-F.; Bait, P.; Heng, C.-H. ; Samudra, G.S. ; Yeo, Y.-C. 
722004Optimal power converter topology for powering future microprocessor demandsSingh, R.P.; Khambadkone, A.M. ; Samudra, G.S. ; Liang, Y.C. 
732008P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swingToh, E.-H.; Wang, G.H.; Weeks, D.; Zhu, M. ; Bauer, M.; Spear, J.; Chan, L.; Thomas, S.G.; Samudra, G. ; Yeo, Y.-C. 
742009Partial SOI superjunction power LDMOS for PIC applicationChen, Y.; Liang, Y.C. ; Samudra, G.S. ; Buddharaju, K.D.; Feng, H.
752008Performance enhancement schemes featuring lattice mismatched S/D stressors concurrently realized on CMOS platform: e-SiGeSn S/D for pFETs by Sn+ implant and SiC S/D for nFETs by C+ implantWang, G.H.; Toh, E.-H.; Wang, X.; Seng, D.H.L.; Tripathy, S.; Osipowicz, T. ; Tau, K.C.; Samudra, G. ; Yeo, Y.-C. 
761999Performance spread optimization of MOS VLSI circuit by statistical parameter designChen, H.M.; Samudra, G.S. ; Chan, D.S.H. ; Ibrahim, Y. 
772004Pmodelling characteristics of silicon quantum dot flash memory with high-k dielectricsZhou, K.H.; Bai, P.; Chong, C.C.; Samudra, G.S. 
782001Poly Flanked VDMOS (PFVDMOS): A superior technology for superjunction devicesGan, K.P.; Liang, Y.C. ; Samudra, G.S. ; Xu, S.M.; Yong, L.
792006Process-induced strained P-MOSFET featuring nickel-platinum silicided source/drainLee, R.T.P. ; Liow, T.-Y.; Tan, K.-M.; Ang, K.-W.; Chui, K.-J.; Guo, Q.-L.; Samudra, G. ; Chi, D.-Z.; Yeo, Y.-C. 
802007Progression of superjunction power MOSFET devicesChen, Y.; Liang, Y.C. ; Samudra, G.S. ; Feng, H.