Full Name
Samudra,Ganesh S
Variants
Samudra, G.G.
SAMUDRA, GANESH SHANKAR
Samudra', G.S.
Samudra, Ganesh S.
Samudra, Ganesh Shankar
Shankar Samudra, Ganesh
Samudra, G.S.
Samudra, Ganesh
Samudra, G.
 
 
 
Email
eleshanr@nus.edu.sg
 

Refined By:
Author:  Samudra, G.
Department:  ELECTRICAL AND COMPUTER ENGINEERING

Results 21-40 of 271 (Search time: 0.007 seconds).

Issue DateTitleAuthor(s)
21Oct-2002A simple technology for superjunction device fabrication: Polyflanked VDMOSFETGan, K.P.; Yang, X.; Liang, Y.C. ; Samudra, G.S. ; Yong, L.
22Jun-2010A simulation study of graphene-nanoribbon tunneling FET with heterojunction channelLam, K.-T.; Seah, D.; Chin, S.-K.; Bala Kumar, S. ; Samudra, G. ; Yeo, Y.-C. ; Liang, G. 
232010A smart-power synchronous rectifier by CMOS processLim, C.Y.; Liang, Y.C. ; Samudra, G.S. ; Balasubramanian, N.
242007A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancementToh, E.-H.; Wang, G.H.; Lo, G.-Q.; Choy, S.-F.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
252008A variational approach to the two-dimensional nonlinear Poisson's equation for the modeling of tunneling transistorsShen, C.; Ong, S.-L.; Heng, C.-H. ; Samudra, G. ; Yeo, Y.-C. 
26Sep-2003Accurate current sensor for lateral IGBT smart power integrationLiang, Y.C. ; Samudra, G.S. ; Lim, J.D.; Ong, P.H.
27Apr-2008Achieving conduction band-edge Schottky barrier height for arsenic-segregated nickel aluminide disilicide and implementation in FinFETs with ultra-narrow fin widthsLee, R.T.-P. ; Liow, T.-Y.; Tan, K.-M.; Lim, A.E.-J.; Koh, A.T.-Y.; Zhu, M. ; Lo, G.-Q.; Samudra, G.S. ; Chi, D.Z.; Yeo, Y.-C. 
281-Sep-2012Advanced modeling of the effective minority carrier lifetime of passivated crystalline silicon wafersMa, F.-J. ; Samudra, G.G. ; Peters, M.; Aberle, A.G. ; Werner, F.; Schmidt, J.; Hoex, B. 
292013AlGaN/GaN power HEMT devices for future energy conversion applicationsLiang, Y.C. ; Samudra, G.S. ; Huang, H.; Huang, C.-F.; Chang, T.-F.
301999An accurate delay model for BiCMOS logic gatesSamudra, G. ; Zhao, B.
312008An enabling device technology for future superjunction power integrated circuitsChen, Y.; Liang, Y.C. ; Samudra, G.S. ; Buddharaju, K.D.; Feng, H.
322006An FPGA based digital control design for high-frequency DC-DC convertersSingh, R.P.; Khambadkone, A.M. ; Samudra, G.S. ; Liang, Y.C. 
332013Analytical modelling of high temperature characteristics on the DC responses for Schottky-gate AlGaN/GaN HEMT devicesWang, Y.-H.; Liang, Y.C. ; Samudra, G.S. ; Chang, T.-F.; Huang, C.-F.; Yuan, L.; Lo, G.-Q.
342014Au-free normally-off AlGaN/GaN-on-Si MIS-HEMTs using combined partially recessed and fluorinated trap-charge gate structuresHuang, H.; Liang, Y.C. ; Samudra, G.S. ; Ngo, C.L.L.
352008Band alignment between amorphous Ge2 Sb2 Te5 and prevalent complementary-metal-oxide-semiconductor materialsFang, L.W.-W.; Pan, J.-S.; Zhao, R.; Shi, L.; Chong, T.-C.; Samudra, G. ; Yeo, Y.-C. 
362008Band edge NMOS work function for nickel fully-silicided (FUSI) gate obtained by the insertion of novel Y-, Tb-, and Yb-based interlayersLim, A.E.-J.; Lee, R.T.P. ; Wang, X.P.; Hwang, W.S.; Tung, C.-H.; Lai, D.M.Y.; Samudra, G. ; Kwong, D.-L.; Yeo, Y.-C. 
372007Beneath-the-channel Strain-Transfer-Structure (STS) and embedded source/drain stressors for strain and performance enhancement of nanoscale MOSFETsAng, K.-W.; Lin, J.; Tung, C.-H.; Balasubramanian, N.; Samudra, G. ; Yeo, Y.-C. 
381992CAD/CAE in semiconductor fabrication: An integrated approachArora, V.K. ; Samudra, G. 
392007Carrier backscattering characteristics of strained N-MOSFET featuring silicon-carbon source/drain regionsAng, K.-W.; Chin, H.-C.; Chui, K.-J.; Li, M.-F. ; Samudra, G. ; Yeo, Y.-C. 
40Nov-2007Carrier backscattering characteristics of strained silicon-on-insulator n-MOSFETs featuring silicon-carbon source/drain regionsAng, K.-W.; Chin, H.-C.; Chui, K.-J.; Li, M.-F. ; Samudra, G.S. ; Yeo, Y.-C.