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Samudra,Ganesh S

rp00141

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Full Name
Samudra,Ganesh S
Variants
Samudra, G.G.
SAMUDRA, GANESH SHANKAR
Samudra', G.S.
Samudra, Ganesh S.
Samudra, Ganesh Shankar
Shankar Samudra, Ganesh
Samudra, G.S.
Samudra, Ganesh
Samudra, G.
 
Main Affiliation
 
Faculty
 
Email
eleshanr@nus.edu.sg
 

Publications

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Author:  Samudra, G.
Department:  COLLEGE OF DESIGN AND ENGINEERING
Type:  Conference Paper

Results 1-20 of 92 (Search time: 0.008 seconds).

Issue DateTitleAuthor(s)
120085 nm gate length nanowire-FETs and planar UTB-FETs with pure germanium source/drain stressors and laser-free Melt-Enhanced Dopant (MeltED) diffusion and activation techniqueLiow, T.-Y.; Tan, K.-M.; Lee, R.T.P. ; Zhu, M. ; Tan, B.L.-H.; Samudra, G.S. ; Balasubramanian, N.; Yeo, Y.-C. 
2200650 nm silicon-on-insulator N-MOSFET featuring multiple stressors: Silicon-carbon source/drain regions and tensile stress silicon nitride linerAng, K.-W.; Chui, K.-J.; Chin, H.-C.; Foo, Y.-L.; Du, A.; Deng, W.; Li, M.-F. ; Samudra, G. ; Balasubramanian, N.; Yeo, Y.-C. 
32006A CMOS compatible smart power synchronous rectifierLim, C.Y.; Liang, Y.C. ; Samudra, G.S. ; Balasubramanian, N.
42008A complementary-I-MOS technology featuring SiGe channel and I-region for enhancement of impact-ionization, breakdown voltage, and performanceToh, E.-H.; Wang, G.H.; Chan, L.; Lo, G.-Q.; Sylvester, D.; Heng, C.-H. ; Samudra, G. ; Yeo, Y.-C. 
52010A computational study on the device performance of graphene nanoribbon heterojunction tunneling FETs based on bandgap engineeringLam, K.-T.; Da, H. ; Chin, S.-K.; Samudra, G. ; Yeo, Y.-C. ; Liang, G. 
62007A new liner stressor with very high intrinsic stress (> 6 GPa) and low permittivity comprising diamond-like carbon (DLC) for strained p-channel transistorsTan, K.-M.; Zhu, M. ; Fang, W.-W.; Yang, M.; Liow, T.-Y.; Lee, R.T.P. ; Hoe, K.M.; Tung, C.-H.; Balasubramanian, N.; Samudra, G.S. ; Yeo, Y.-C. 
72009A new robust non-local algorithm for band-to-band tunneling simulation and its application to tunnel-FETShen, C.; Yang, L.T.; Toh, E.-H.; Heng, C.-H. ; Samudra, G.S. ; Yeo, Y.-C. 
82008A new salicidation process with solid Antimony (Sb) segregation (SSbS) for achieving sub-0.1 eV effective schottky barrier height and parasitic series resistance reduction in N-channel transistorsWong, H.-S.; Koh, A.T.-Y.; Chin, H.-C.; Lee, R.T.-P. ; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
92008A new source/drain germanium-enrichment process comprising Ge deposition and laser-induced local melting and recrystallization for P-FET performance enhancementLiu, F.; Wong, H.-S.; Ang, K.-W.; Zhu, M. ; Wang, X.; Lai, D.M.-Y.; Lim, P.-C.; Tan, B.L.H.; Tripathy, S.; Oh, S.-A.; Samudra, G.S. ; Balasubramanian, N.; Yeo, Y.-C. 
102005A novel CMOS compatible L-shaped impact-ionization MOS (LI-MOS) transistorToh, E.-H.; Wang, G.H.; Lo, G.-Q.; Balasubramanian, N.; Tung, C.-H.; Benistant, F.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
112007A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancementToh, E.-H.; Wang, G.H.; Lo, G.-Q.; Choy, S.-F.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
122013AlGaN/GaN power HEMT devices for future energy conversion applicationsLiang, Y.C. ; Samudra, G.S. ; Huang, H.; Huang, C.-F.; Chang, T.-F.
132008An enabling device technology for future superjunction power integrated circuitsChen, Y.; Liang, Y.C. ; Samudra, G.S. ; Buddharaju, K.D.; Feng, H.
142006An FPGA based digital control design for high-frequency DC-DC convertersSingh, R.P.; Khambadkone, A.M. ; Samudra, G.S. ; Liang, Y.C. 
152013Analytical modelling of high temperature characteristics on the DC responses for Schottky-gate AlGaN/GaN HEMT devicesWang, Y.-H.; Liang, Y.C. ; Samudra, G.S. ; Chang, T.-F.; Huang, C.-F.; Yuan, L.; Lo, G.-Q.
162008Band edge NMOS work function for nickel fully-silicided (FUSI) gate obtained by the insertion of novel Y-, Tb-, and Yb-based interlayersLim, A.E.-J.; Lee, R.T.P. ; Wang, X.P.; Hwang, W.S.; Tung, C.-H.; Lai, D.M.Y.; Samudra, G. ; Kwong, D.-L.; Yeo, Y.-C. 
172007Beneath-the-channel Strain-Transfer-Structure (STS) and embedded source/drain stressors for strain and performance enhancement of nanoscale MOSFETsAng, K.-W.; Lin, J.; Tung, C.-H.; Balasubramanian, N.; Samudra, G. ; Yeo, Y.-C. 
182007Carrier backscattering characteristics of strained N-MOSFET featuring silicon-carbon source/drain regionsAng, K.-W.; Chin, H.-C.; Chui, K.-J.; Li, M.-F. ; Samudra, G. ; Yeo, Y.-C. 
192010Carrier transport characteristics of strained N-MOSFET featuring channel proximate silicon-carbon source/drain stressors for performance boostKoh, S.-M.; Zhang, P.; Ren, S.-F.; Ng, C.-M.; Samudra, G.S. ; Yeo, Y.-C. 
202006Carrier transport characteristics of Sub-30 nm strained N-channel FinFETs featuring silicon-carbon source/drain regions and methods for further performance enhancementLiow, T.-Y.; Tan, K.-M.; Chin, H.-C.; Lee, R.T.P. ; Tung, C.-H.; Samudra, G.S. ; Balasubramanian, N.; Yeo, Y.-C.