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Yee Chia Yeo

rp09882

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Full Name
Yee Chia Yeo
Variants
Yeo, Y.
Yeo Y.-C.
Yeo, Y.C.
Yeo, Y.-C.
Yeo., Y.-C.
 
Main Affiliation
 
Faculty
 
Email
eleyeoyc@nus.edu.sg
 

Publications

Refined By:
Date Issued:  [2000 TO 2023]
Type:  Article
Date Issued:  [2000 TO 2009]

Results 1-20 of 128 (Search time: 0.005 seconds).

Issue DateTitleAuthor(s)
1Feb-2008A double-spacer I-MOS transistor with shallow source junction and lightly doped drain for reduced operating voltage and enhanced device performanceToh, E.-H.; Wang, G.H.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
2Aug-2004A dual-metal gate integration process for CMOS with sub-1-nm EOT HfO2 by using HfN replacement gateRen, C.; Yu, H.Y. ; Kang, J.F.; Wang, X.P.; Ma, H.H.H. ; Yeo, Y.-C. ; Chan, D.S.H. ; Li, M.-F. ; Kwong, D.-L.
3Jan-2006A fast measurement technique of MOSFET Id-Vg characteristicsShen, C.; Li, M.-F. ; Wang, X.P.; Yeo, Y.-C. ; Kwong, D.-L.
4Feb-2008A high-stress liner comprising diamond-like carbon (DLC) for strained p-channel MOSFETTan, K.-M.; Zhu, M. ; Fang, W.-W.; Yang, M.; Liow, T.-Y.; Lee, R.T.P. ; Hoe, K.M.; Tung, C.-H.; Balasubramanian, N.; Samudra, G.S. ; Yeo, Y.-C. 
52008A variational approach to the two-dimensional nonlinear Poisson's equation for the modeling of tunneling transistorsShen, C.; Ong, S.-L.; Heng, C.-H. ; Samudra, G. ; Yeo, Y.-C. 
6Apr-2008Achieving conduction band-edge Schottky barrier height for arsenic-segregated nickel aluminide disilicide and implementation in FinFETs with ultra-narrow fin widthsLee, R.T.-P. ; Liow, T.-Y.; Tan, K.-M.; Lim, A.E.-J.; Koh, A.T.-Y.; Zhu, M. ; Lo, G.-Q.; Samudra, G.S. ; Chi, D.Z.; Yeo, Y.-C. 
72009Achieving sub-0.1 ev hole schottky barrier height for NiSiGe on SiGe by aluminum segregationSinha, M.; Lee, R.T.P. ; Lohani, A.; Mhaisalkar, S.; Chor, E.F. ; Yeo, Y.-C. 
82006Aluminum oxynitride interfacial passivation layer for high-permittivity gate dielectric stack on gallium arsenideZhu, M. ; Tung, C.-H.; Yeo, Y.-C. 
9May-2008Analysis of the effects of fringing electric field on finFET device performance and structural optimization using 3-D simulationZhao, H.; Yeo, Y.-C. ; Rustagi, S.C.; Samudra, G.S.
102008Band alignment between amorphous Ge2 Sb2 Te5 and prevalent complementary-metal-oxide-semiconductor materialsFang, L.W.-W.; Pan, J.-S.; Zhao, R.; Shi, L.; Chong, T.-C.; Samudra, G. ; Yeo, Y.-C. 
11Nov-2007Carrier backscattering characteristics of strained silicon-on-insulator n-MOSFETs featuring silicon-carbon source/drain regionsAng, K.-W.; Chin, H.-C.; Chui, K.-J.; Li, M.-F. ; Samudra, G.S. ; Yeo, Y.-C. 
122008Chemical reversability of the electrical dedoping of conducting polymers: An organic chemically erasable programmable read-only memoryChia, P.-J. ; Yeo, Y.-C. ; Burroughes, J.H.; Friend, R.H. ; Ho, P.K.-H. 
13Jul-2008Cointegration of in situ doped silicon-carbon source and silicon-carbon I-region in P-channel silicon nanowire impact-ionization transistorToh, E.-H.; Wang, G.H.; Chan, L.; Weeks, D.; Bauer, M.; Spear, J.; Thomas, S.G.; Samudra, G. ; Yeo, Y.-C. 
142008Compact HSPICE model for IMOS deviceLin, J. ; Toh, E.H.; Shen, C.; Sylvester, D.; Heng, C.H. ; Samudra, G. ; Yeo, Y.C. 
1525-Apr-2008Concept of strain-transfer-layer and integration with graded silicon-germanium source/drain stressors for p-type field effect transistor performance enhancementWang, G.H.; Toh, E.-H.; Tung, C.-H.; Tripathy, S.; Samudra, G.S. ; Yeo, Y.-C. 
162009Contact resistance reduction technology using selenium egregation for N-MOSFETs with silicon-carbon source/drainWong, H.-S.; Ang, K.-W.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
17Feb-2007Controlled insulator-to-metal transformation in printable polymer composites with nanometal clustersSivaramakrishnan, S. ; Chia, P.-J. ; Yeo, Y.-C. ; Chua, L.-L. ; Ho, P.K.-H. 
182009Dependence of energy band offsets at Ge2Sb2Te 5 / SiO2 interface on nitrogen concentrationFang, L.W.-W.; Zheng, Z.; Pan, J.-S.; Zhao, R.; Li, M.; Shi, L.; Chong, T.-C. ; Yeo, Y.-C. 
1925-Apr-2008Device design and scalability of a double-gate tunneling field-effect transistor with silicon - germanium sourceToh, E.-H.; Wang, G.H.; Chan, L.; Sylvester, D.; Heng, C.-H. ; Samudra, G.S. ; Yeo, Y.-C. 
202007Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimizationToh, E.-H.; Wang, G.H.; Samudra, G. ; Yeo, Y.-C.