Full Name
Loh Wei Yip
(not current staff)
Loh, W.Y.
Loh, W.-Y.


Results 1-11 of 11 (Search time: 0.006 seconds).

Issue DateTitleAuthor(s)
12003Analysis of Charge Trapping and Breakdown Mechanism in High-K Dielectrics with Metal Gate Electrode Using Carrier SeparationLoh, W.Y. ; Cho, B.C. ; Joo, M.S. ; Li, M.F. ; Chan, D.S.H. ; Mathew, S.; Kwong, D.-L.
22001Bipolar current stressing and electrical recovery of quasi-breakdown in thin gate oxidesLoh, W.Y. ; Cho, B.J. ; Li, M.F. 
3Dec-2004Charge trapping and breakdown mechanism in HfAlO/TaN gate stack analyzed using carrier separationLoh, W.-Y. ; Cho, B.J. ; Joo, M.S. ; Li, M.-F. ; Chan, D.S.H. ; Mathew, S.; Kwong, D.-L.
48-Jul-2002Correlation between interface traps and gate oxide leakage current in the direct tunneling regimeLoh, W.Y. ; Cho, B.J. ; Li, M.F. 
515-Apr-2002Evolution of quasi-breakdown in thin gate oxidesLoh, W.Y. ; Cho, B.J. ; Li, M.F. 
62007GaAs heteroepitaxy on SiGe-on-insulator using ge condensation and migration enhanced epitaxyOh, H.J. ; Choi, K.J.; Loh, W.Y. ; Htoo, T. ; Chua, S.J. ; Cho, B.J. 
7Jun-2002Impact of decoupled plasma nitridation of ultra-thin gate oxide on the performance of p-channel MOSFETsLek, C.M.; Cho, B.J. ; Ang, C.H.; Tan, S.S.; Loh, W.Y. ; Zhen, J.Z.; Lap, C.
82007Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devicesZang, H.; Loh, W.Y. ; Oh, H.J. ; Choi, K.J.; Nguyen, H.S.; Lo, G.Q.; Cho, B.J. 
9May-2002Investigation of quasi-breakdown mechanism through post-quasi-breakdown thermal annealingLoh, W.Y. ; Cho, B.J. ; Li, M.F. 
10Apr-2003Localized oxide degradation in ultrathin gate dielectric and its statistical analysisLoh, W.Y. ; Cho, B.J. ; Li, M.F. ; Chan, D.S.H. ; Ang, C.H.; Zheng, J.Z.; Kwong, D.L.
11Dec-2007Tensile-strained germanium CMOS integration on siliconZang, H.; Loh, W.Y. ; Ye, J.D.; Lo, G.Q.; Cho, B.J.