Charge trapping and breakdown mechanism in HfAlO/TaN gate stack analyzed using carrier separation

Please use this identifier to cite or link to this item: https://doi.org/10.1109/TDMR.2004.838416

Title:	Charge trapping and breakdown mechanism in HfAlO/TaN gate stack analyzed using carrier separation
Authors:	Loh, W.-Y. Cho, B.J. Joo, M.S. Li, M.-F. Chan, D.S.H. Mathew, S. Kwong, D.-L.
Keywords:	Gate leakage current Gate stacks High-K dielectrics Reliability Tunneling
Issue Date:	Dec-2004
Citation:	Loh, W.-Y., Cho, B.J., Joo, M.S., Li, M.-F., Chan, D.S.H., Mathew, S., Kwong, D.-L. (2004-12). Charge trapping and breakdown mechanism in HfAlO/TaN gate stack analyzed using carrier separation. IEEE Transactions on Device and Materials Reliability 4 (4) : 696-703. ScholarBank@NUS Repository. https://doi.org/10.1109/TDMR.2004.838416
Abstract:	Charge trapping and breakdown mechanism in p- and n-channel MOSFETs with an HfAl xO y and TaN metal electrode are investigated. Using carrier separation measurement technique, it is possible to clearly distinguish two different breakdown mechanisms: a high-K bulk initiated and an interfacial layer initiated breakdown. A model of charge trapping at different spatial locations in HfAl xO y with a TaN gate structure is proposed to explain the polarity dependence of charge trapping characteristics and breakdown mechanisms.
Source Title:	IEEE Transactions on Device and Materials Reliability
URI:	http://scholarbank.nus.edu.sg/handle/10635/82049
ISSN:	15304388
DOI:	10.1109/TDMR.2004.838416
Appears in Collections:	Staff Publications

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