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Samudra,Ganesh S

rp00141

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Full Name
Samudra,Ganesh S
Variants
Samudra, G.G.
SAMUDRA, GANESH SHANKAR
Samudra', G.S.
Samudra, Ganesh S.
Samudra, Ganesh Shankar
Shankar Samudra, Ganesh
Samudra, G.S.
Samudra, Ganesh
Samudra, G.
 
Main Affiliation
 
Faculty
 
Email
eleshanr@nus.edu.sg
 

Publications

Refined By:
Author:  Samudra, G.
Department:  COLLEGE OF DESIGN AND ENGINEERING
Author:  Toh, E.-H.
Type:  Conference Paper

Results 1-16 of 16 (Search time: 0.005 seconds).

Issue DateTitleAuthor(s)
12008A complementary-I-MOS technology featuring SiGe channel and I-region for enhancement of impact-ionization, breakdown voltage, and performanceToh, E.-H.; Wang, G.H.; Chan, L.; Lo, G.-Q.; Sylvester, D.; Heng, C.-H. ; Samudra, G. ; Yeo, Y.-C. 
22009A new robust non-local algorithm for band-to-band tunneling simulation and its application to tunnel-FETShen, C.; Yang, L.T.; Toh, E.-H.; Heng, C.-H. ; Samudra, G.S. ; Yeo, Y.-C. 
32005A novel CMOS compatible L-shaped impact-ionization MOS (LI-MOS) transistorToh, E.-H.; Wang, G.H.; Lo, G.-Q.; Balasubramanian, N.; Tung, C.-H.; Benistant, F.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
42007A strained N-channel impact-ionization MOS (I-MOS) transistor with elevated silicon-carbon source/drain for performance enhancementToh, E.-H.; Wang, G.H.; Lo, G.-Q.; Choy, S.-F.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
52007Fabrication of strain relaxed silicon-germanium-on-insulator (Si 0.35Ge0.65OI) wafers using cyclical thermal oxidation and annealingWang, G.H.; Toh, E.-H.; Tung, C.-H.; Foo, Y.-L.; Tripathy, S.; Lo, G.-Q.; Samudra, G. ; Yeo, Y.-C. 
62007Impact ionization nanowire transistor with multiple-gates, silicon-germanium impact ionization region, and sub-5 mV/decade subtheshold swingToh, E.-H.; Wang, G.H.; Zhu, M. ; Shen, C.; Chan, L.; Lo, G.-Q.; Tung, C.-H.; Sylvester, D.; Heng, C.-H. ; Samudra, G. ; Yeo, Y.-C. 
72007On the performance limit of impact-ionization transistorsShen, C.; Lin, J.-Q.; Toh, E.-H.; Chang, K.-F.; Bait, P.; Heng, C.-H. ; Samudra, G.S. ; Yeo, Y.-C. 
82008P-channel I-MOS transistor featuring silicon nano-wire with multiple-gates, strained Si1-yCy I-region, in situ doped Si 1-yCy source, and sub-5 mV/decade subthreshold swingToh, E.-H.; Wang, G.H.; Weeks, D.; Zhu, M. ; Bauer, M.; Spear, J.; Chan, L.; Thomas, S.G.; Samudra, G. ; Yeo, Y.-C. 
92008Performance enhancement schemes featuring lattice mismatched S/D stressors concurrently realized on CMOS platform: e-SiGeSn S/D for pFETs by Sn+ implant and SiC S/D for nFETs by C+ implantWang, G.H.; Toh, E.-H.; Wang, X.; Seng, D.H.L.; Tripathy, S.; Osipowicz, T. ; Tau, K.C.; Samudra, G. ; Yeo, Y.-C. 
102008Realization of silicon-germanium-tin (SiGeSn) source/ drain stressors by Sn implant and solid phase epitaxy for strain engineering in SiGe channel P-MOSFETsWang, G.H.; Toh, E.-H.; Chan, T.K.; Osipowicz, T.; Foo, Y.-L.; Tung, C.H.; Lo, G.-Q.; Samudra, G. ; Yeo, Y.-C. 
112007Silicon nano-wire impact ionization transistors with multiple-gates for enhanced gate control and performanceToh, E.-H.; Wang, G.H.; Shen, C.; Zhu, M. ; Chan, L.; Heng, C.-H. ; Samudra, G. ; Yeo, Y.-C. 
122007Silicon-germanium-tin (SiGeSn) source and drain stressors formed by Sn implant and laser annealing for strained silicon-germanium channel P-MOSFETsWang, G.H.; Toh, E.-H.; Wang, X.; Seng, D.H.L.; Tripathy, S.; Osipowicz, T.; Chan, T.K.; Hoe, K.M.; Balakumar, S.; Tung, C.H.; Lo, G.-Q.; Samudra, G. ; Yeo, Y.-C. 
132007Strained Si n-FET featuring compliant SiGe Stress Transfer Layer (STL) and Si0.98C0.02 source/drain stressors for performance enhancementWang, G.H.; Toh, E.-H.; Weeks, D.; Landin, T.; Spear, J.; Tung, C.H.; Thomas, S.G.; Samudra, G. ; Yeo, Y.-C. 
142006Strained silicon-germanium-on-insulator N-MOSFETs featuring lattice mismatched source/drain stressor and high-stress silicon nitride linerWang, G.H.; Toh, E.-H.; Toh; Hoe, K.M.; Tripathy, S.; Balakurnar, S.; Lo, G.-Q.; Samudra, G. ; Yeo, Y.-C. 
152007Sub 50nm strained n-FETs formed on silicon-germanium-on-insulator substrates and the integration of silicon source/drain stressorsWang, G.H.; Toh, E.-H.; Hoe, K.-M.; Tripathy, S.; Lo, G.-Q.; Samudra, G. ; Yeo, Y.-C. 
162008Uniaxial strained silicon n-FETs on silicon-germanium-on-insulator substrates with an e-Si0.7Ge0.3 stress transfer layer and source/drain stressors for performance enhancementWang, G.H.; Toh, E.-H.; Foo, Y.-L.; Tripathy, S. ; Balakumar, S.; Lo, G.-Q.; Samudra, G. ; Yeo, Y.-C.