Please use this identifier to cite or link to this item:
|Title:||Improved electrical and reliability characteristics of hfn-hfo2-gated nMOSFET with 0.95-nm EOT fabricated using a gate-first process||Authors:||Kang, F.J.
|Keywords:||HfO2 gate dielectric
Instability of Vth
Sub-1-nm equivalent oxide thickness (EOT)
|Issue Date:||Apr-2005||Citation:||Kang, F.J., Yu, H.Y., Ren, C., Wang, X.P., Li, M.-F., Chan, D.S.H., Yeo, Y.-C., Sa, N., Yang, H., Liu, X.Y., Han, R.Q., Kwong, D.-L. (2005-04). Improved electrical and reliability characteristics of hfn-hfo2-gated nMOSFET with 0.95-nm EOT fabricated using a gate-first process. IEEE Electron Device Letters 26 (4) : 237-239. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2005.845496||Abstract:||By using a high-temperature gate-first process, HfN-HfO2-gated nMOSFET with 0.95-nm equivalent oxide thickness (EOT) was fabricated. The excellent device characteristics such as the sub-l-nm EOT, high electron effective mobility (peak value ∼ 232 cm2/V. s) and robust electrical stability under a positive constant voltage stress were achieved. These improved device performances achieved in the sub-l-nm HfN-HfO2-gated nMOSFETs could be attributed to the low interfacial and bulk traps charge density of HfO2 layer due to the 950 °C high-temperature source/ drain activation annealing process after deposition of the HfN-HfO2 gate stack. © 2005 IEEE.||Source Title:||IEEE Electron Device Letters||URI:||http://scholarbank.nus.edu.sg/handle/10635/82504||ISSN:||07413106||DOI:||10.1109/LED.2005.845496|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Mar 5, 2021
WEB OF SCIENCETM
checked on Feb 25, 2021
checked on Mar 1, 2021
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.