Full Name
Samudra,Ganesh S
Variants
Samudra, G.G.
SAMUDRA, GANESH SHANKAR
Samudra', G.S.
Samudra, Ganesh S.
Samudra, Ganesh Shankar
Shankar Samudra, Ganesh
Samudra, G.S.
Samudra, Ganesh
Samudra, G.
 
 
 
Email
eleshanr@nus.edu.sg
 

Refined By:
Date Issued:  [2000 TO 2009]
Author:  Yeo, Y.-C.

Results 21-40 of 135 (Search time: 0.005 seconds).

Issue DateTitleAuthor(s)
21Jul-2008Cointegration of in situ doped silicon-carbon source and silicon-carbon I-region in P-channel silicon nanowire impact-ionization transistorToh, E.-H.; Wang, G.H.; Chan, L.; Weeks, D.; Bauer, M.; Spear, J.; Thomas, S.G.; Samudra, G. ; Yeo, Y.-C. 
222008Compact HSPICE model for IMOS deviceLin, J. ; Toh, E.H.; Shen, C.; Sylvester, D.; Heng, C.H. ; Samudra, G. ; Yeo, Y.C. 
2325-Apr-2008Concept of strain-transfer-layer and integration with graded silicon-germanium source/drain stressors for p-type field effect transistor performance enhancementWang, G.H.; Toh, E.-H.; Tung, C.-H.; Tripathy, S.; Samudra, G.S. ; Yeo, Y.-C. 
242009Contact resistance reduction technology using selenium egregation for N-MOSFETs with silicon-carbon source/drainWong, H.-S.; Ang, K.-W.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
2525-Apr-2008Device design and scalability of a double-gate tunneling field-effect transistor with silicon - germanium sourceToh, E.-H.; Wang, G.H.; Chan, L.; Sylvester, D.; Heng, C.-H. ; Samudra, G.S. ; Yeo, Y.-C. 
262007Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimizationToh, E.-H.; Wang, G.H.; Samudra, G. ; Yeo, Y.-C. 
272008Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applicationsToh, E.-H.; Wang, G.H.; Samudra, G. ; Yeo, Y.-C. 
282007Device physics and guiding principles for the design of double-gate tunneling field effect transistor with silicon-germanium source heterojunctionToh, E.-H.; Wang, G.H.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
2925-Apr-2008Device physics and performance optimization of impact-ionization metal-oxide-semiconductor transistors formed using a double-spacer fabrication processToh, E.-H.; Wang, G.H.; Chan, L.; Samudra, G.S. ; Yeo, Y.-C. 
30Sep-2006Drive-current enhancement in FinFETs using gate-induced stressTan, K.-M.; Liow, T.-Y.; Lee, R.T.P. ; Tung, C.-H.; Samudra, G.S. ; Yoo, W.-J. ; Yeo, Y.-C. 
31Dec-2007Effective Schottky Barrier height reduction using sulfur or selenium at the NiSi/n-Si (100) interface for low resistance contactsWong, H.-S.; Chan, L.; Samudra, G. ; Yeo, Y.-C. 
3225-Apr-2008Effectiveness of aluminum incorporation in nickel silicide and nickel germanide metal gates for work function reductionLim, A.E.-J.; Lee, R.T.P. ; Koh, A.T.Y.; Samudra, G.S. ; Kwong, D.-L. ; Yeo, Y.-C. 
33Oct-2007Electrical characteristics of memory devices with a high-k HfO2 trapping layer and dual SiO2/Si3 N4 tunneling layerWang, Y.Q.; Hwang, W.S.; Zhang, G.; Samudra, G. ; Yeo, Y.-C. ; Yoo, W.J.
142007Enhanced carrier transport in strained bulk N-MOSFETs with silicon-carbon source/drain stressorsAng, K.-W.; Chui, K.-J.; Tung, C.-H.; Samudra, G. ; Balasubramanian, N.; Yeo, Y.-C. 
152004Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regionsAng, K.W.; Chui, K.J.; Bliznetsov, V.; Du, A.; Balasubramanian, N.; Li, M.F. ; Samudra, G. ; Yeo, Y.-C. 
162007Enhanced performance in strained n-FET with double-recessed Si:C source/drain and lattice-mismatched SiGe strain-transfer structure (STS)Ang, K.-W.; Wong, H.-S.; Balasubramanian, N.; Samudra, G. ; Yeo, Y.-C. 
17Apr-2007Enhanced strain effects in 25-nm gate-length thin-body nMOSFETs with silicon-carbon source/drain and tensile-stress linerAng, K.-W.; Chui, K.-J.; Tung, C.-H.; Balasubramanian, N.; Li, M.-F. ; Samudra, G.S. ; Yeo, Y.-C. 
182005Enhancement of memory window in short channel non-volatile memory devices using double layer tungsten nanocrystalsSamanta, S.K. ; Singh, P.K.; Yoo, W.J. ; Samudra, G. ; Yeo, Y.-C. ; Bera, L.K.; Balasubramanian, N.
192008Epitaxial growth of single crystalline Ge films on GaAs substrates for CMOS device integrationChin, H.-C.; Zhu, M. ; Samudra, G. ; Yeo, Y.-C. 
202008Fabrication of gate stack with high gate work function for implantless enhancement-mode GaAs n -channel metal-oxide-semiconductor field effect transistor applicationsZhu, M. ; Chin, H.-C.; Samudra, G.S. ; Yeo, Y.-C.