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Title: Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions
Authors: Ang, K.W.
Chui, K.J.
Bliznetsov, V.
Du, A.
Balasubramanian, N.
Li, M.F. 
Samudra, G. 
Yeo, Y.-C. 
Issue Date: 2004
Citation: Ang, K.W.,Chui, K.J.,Bliznetsov, V.,Du, A.,Balasubramanian, N.,Li, M.F.,Samudra, G.,Yeo, Y.-C. (2004). Enhanced performance in 50 nm N-MOSFETs with silicon-carbon source/drain regions. Technical Digest - International Electron Devices Meeting, IEDM : 1069-1071. ScholarBank@NUS Repository.
Abstract: This paper reports a novel strained N-channel transistor structure with sub-100 nm gate lengths. The strained N-MOSFET features silicon-carbon (SiC) source and drain (S/D) regions formed by a Si recess etch and a selective epitaxy of SiC in the S/D regions. The carbon mole fraction incorporated is 1.3%. Lattice mismatch of ∼0.6S% between SiC and Si results in horizontal tensile strain and vertical compressive strain in the Si channel region, both contributing to substantial electron mobility enhancement. The conduction band offset ΔE c between the SiC source and the strained-Si channel also contributes to increased electron injection velocity from the source. Implementation of the SiC Stressors provides significant drive current I DS enhancement in the N-MOSFETs. I DS enhancement of 50% was observed for a gate length of 50 nm. © 2004 IEEE.
Source Title: Technical Digest - International Electron Devices Meeting, IEDM
ISSN: 01631918
Appears in Collections:Staff Publications

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