Please use this identifier to cite or link to this item:
|Title:||Silane-ammonia surface passivation for gallium arsenide surface-channel n-MOSFETs||Authors:||Chin, H.-C.
|Issue Date:||2009||Citation:||Chin, H.-C., Zhu, M., Liu, X., Lee, H.-K., Shi, L., Tan, L.-S., Yeo, Y.-C. (2009). Silane-ammonia surface passivation for gallium arsenide surface-channel n-MOSFETs. IEEE Electron Device Letters 30 (2) : 110-112. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2008.2010831||Abstract:||A novel surface passivation technology employing silane SiH4 and ammonia NH3 was demonstrated to realize high-quality metal-gate/high-k dielectric stack on GaAs. In addition to ex situ cleaning/passivation and in situ vacuum anneal to remove the native oxide on GaAs, the key improvements reported in this letter include the introduction of NH3 in a SiH4 passivation to form a SiN passivation layer that protects the GaAs surface from exposure to the oxidizing ambient during high- k dielectric deposition. Negligible As-O and Ga-O bonds were found. This passivation technology was integrated in a metal-organic chemical-vapor deposition tool. Inversion-type GaAs n-MOSFETs were fabricated with the SiH4 and NH3 passivation technology, showing good electrical characteristics with a peak effective mobility of 1920 cm2/ V·s, an IonIoff ratio of ∼105, and a subthreshold swing of ∼ 98 mV/dec, in surface-channel GaAs MOSFETs with a gate length of 2 μm. © 2009 IEEE.||Source Title:||IEEE Electron Device Letters||URI:||http://scholarbank.nus.edu.sg/handle/10635/83019||ISSN:||07413106||DOI:||10.1109/LED.2008.2010831|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on May 22, 2020
WEB OF SCIENCETM
checked on May 13, 2020
checked on May 10, 2020
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.