Nickel-silicide contact technology with dual near-band-edge barrier heights and integration in CMOS FinFETs with single mask

Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2010.2052586

Title:	Nickel-silicide contact technology with dual near-band-edge barrier heights and integration in CMOS FinFETs with single mask
Authors:	Sinha, M. Chor, E.F. Yeo, Y.-C.
Keywords:	Aluminum (Al) implant contact resistance double-species implant FinFETs nickel silicide (NiSi) Schottky barrier height sulfur (S) implant
Issue Date:	Sep-2010
Citation:	Sinha, M., Chor, E.F., Yeo, Y.-C. (2010-09). Nickel-silicide contact technology with dual near-band-edge barrier heights and integration in CMOS FinFETs with single mask. IEEE Electron Device Letters 31 (9) : 918-920. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2010.2052586
Abstract:	This letter reports the demonstration of a nickel-silicide contact technology that achieves dual near-band-edge barrier heights (i.e., a low electron barrier height Φn B for n-FETs and a low hole barrier height ΦP B for p-FETs) using just one additional masking and two ion-implant steps. Independent and effective tuning of contact resistance RC is achieved in both p-and n-FinFETs. The compensation effect of aluminum and sulfur implants is studied for the first time and exploited for process simplification. A novel cost-effective integration scheme is shown to give significant IDSAT enhancement for p-and n-FinFETs. © 2010 IEEE.
Source Title:	IEEE Electron Device Letters
URI:	http://scholarbank.nus.edu.sg/handle/10635/82762
ISSN:	07413106
DOI:	10.1109/LED.2010.2052586
Appears in Collections:	Staff Publications

There are no files associated with this item.

Check