Publications

Results 41-60 of 99 (Search time: 0.006 seconds).

Issue DateTitleAuthor(s)
412007Exploiting branch constraints without exhaustive path enumerationChen, T. ; Mitra, T. ; Roychoudhury, A. ; Suhendra, V. 
422006Exploiting forwarding to improve data bandwidth of instruction-set extensionsJayaseelan, R.; Liu, H. ; Mitra, T. 
432008Exploring locking & partitioning for predictable shared caches on multi-coresSuhendra, V. ; Mitra, T. 
42008Fast and accurate simulation of biomonitoring applications on a wireless body area networkNguyen, K.D. ; Cutcutache, I. ; Sinnadurai, S. ; Liu, S. ; Basol, C. ; Sim, E. ; Phan, L.T.X. ; Tok, T.B. ; Xu, L. ; Tay, F.E.H. ; Mitra, T. ; Wong, W.-F. 
52009Generating test programs to cover pipeline interactionsThanh, N.D.; Roychoudhury, A. ; Mitra, T. ; Mishra, P.
62012Graph minor approach for application mapping on CGRAsChen, L.; Mitra, T. 
72006Handling constraints in multi-objective GA for embedded system designChakraborty, B. ; Chen, T. ; Mitra, T. ; Roychoudhury, A. 
82013Hierarchical power management for asymmetric multi-core in dark silicon eraMuthukaruppan, T.S.; Pricopi, M.; Venkataramani, V.; Mitra, T. ; Vishin, S.
93-Dec-2021HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical AbstractionDhananjaya Wijerathne ; Zhaoying Li; Anuj Pathania; Tulika Mitra ; Lothar Thiele
1010-Oct-2022HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical AbstractionDhananjaya Wijerathne ; Zhaoying Li; Anuj Pathania; Tulika Mitra ; Lothar Thiele
112004Impact of java memory model on out-of-order multiprocessorsMitra, T. ; Roychoudhury, A. ; Shen, Q.
122013Implementation of core coalition on FPGAsMysur, K.T.; Pricopi, M.; Marconi, T.; Mitra, T. 
132010Improved procedure placement for set associative cachesLiang, Y.; Mitra, T. 
142004Improving rendering performance by texture-map-based triangle stripsYang, Y.; Tulika, M. ; HUANG ZHIYONG 
152007Instruction-set customization for real-time embedded systemsHuynh, P.; Mitra, T. 
162013Integrated instruction cache analysis and locking in multitasking real-time systemsDing, H.; Liang, Y.; Mitra, T. 
172006Integrated scratchpad memory optimization and task scheduling for MPSoC architecturesSuhendra, V. ; Raghavan, C. ; Mitra, T. 
182013Introduction to the special issue on application-specific processorsBrisk, P.; Mitra, T. 
192010Intruction cache locking using temporal reuse profileLiang, Y. ; Mitra, T. 
201-Feb-2020KLEESPECTRE: Detecting Information Leakage through Speculative Cache Attacks via Symbolic Execution.Wang, Guanhua ; Chattopadhyay, Sudipta ; Biswas, Arnab Kumar ; Mitra, Tulika ; Roychoudhury, Abhik