SPICE behavioral model of the tunneling field-effect transistor for circuit simulation

Please use this identifier to cite or link to this item: https://doi.org/10.1109/TCSII.2009.2035274

Title:	SPICE behavioral model of the tunneling field-effect transistor for circuit simulation
Authors:	Hong, Y. Yang, Y. Yang, L. Samudra, G. Heng, C.-H. Yeo, Y.-C.
Keywords:	Behavioral modeling Inverter SPICE simulation Tunneling field-effect transistor (TFET)
Issue Date:	Dec-2009
Citation:	Hong, Y., Yang, Y., Yang, L., Samudra, G., Heng, C.-H., Yeo, Y.-C. (2009-12). SPICE behavioral model of the tunneling field-effect transistor for circuit simulation. IEEE Transactions on Circuits and Systems II: Express Briefs 56 (12) : 946-950. ScholarBank@NUS Repository. https://doi.org/10.1109/TCSII.2009.2035274
Abstract:	The tunneling field-effect transistor (TFET) is an alternative device for deep-submicrometer CMOS with very good short channel and leakage characteristics. In this brief, a SPICE behavioral model that well captures the I-V characteristics and the parasitic capacitance of the n-channel TFET is proposed to facilitate efficient circuit design and simulation. The validity of the model is verified with technology computer-aided design (TCAD) simulation. The accuracy is within 10% and is of an order of magnitude faster than the TCAD. © 2009 IEEE.
Source Title:	IEEE Transactions on Circuits and Systems II: Express Briefs
URI:	http://scholarbank.nus.edu.sg/handle/10635/57473
ISSN:	15497747
DOI:	10.1109/TCSII.2009.2035274
Appears in Collections:	Staff Publications

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