Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/35266
Title: | Planar microspring integrated circuit chip interconnection to next level | Authors: | TAY, ANDREW AH ONG ANG, SIMON SAW-TEONG LIAO, EBIN |
Issue Date: | 7-Sep-2006 | Citation: | TAY, ANDREW AH ONG,ANG, SIMON SAW-TEONG,LIAO, EBIN (2006-09-07). Planar microspring integrated circuit chip interconnection to next level. ScholarBank@NUS Repository. | Abstract: | An interconnect structure for interconnecting an integrated circuit (IC) chip to a next level, a method of fabricating the interconnect at wafer level, and a method of interconnecting an integrated circuit (IC) chip to the next level. The interconnect structure comprises one or more planar micro-spring elements formed on a packaging surface of the chip and connected to an interconnection pad; wherein the interconnection pad is resiliently moveable horizontally and vertically with respect to the surface of the chip. A layer of solder is preferably electroplated onto the interconnection pad to provide interconnection to the next level. In a variation of the interconnect structure, a metal column is fabricated onto the interconnection pad prior to electroplating the solder layer. | URI: | http://scholarbank.nus.edu.sg/handle/10635/35266 |
Appears in Collections: | Staff Publications |
Show full item record
Files in This Item:
File | Description | Size | Format | Access Settings | Version | |
---|---|---|---|---|---|---|
US20060197232A1.PDF | 306.79 kB | Adobe PDF | OPEN | Published | View/Download |
Google ScholarTM
Check
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.