PARK CHANG SEO

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Full Name

PARK CHANG SEO

(not current staff)

Variants

Park, C.S.
PARK, CHANG SEO

Main Affiliation

ELECTRICAL AND COMPUTER ENGINEERING

Faculty

FAC OF ENGINEERING

elepcs@nus.edu.sg

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Department: ELECTRICAL AND COMPUTER ENGINEERING

Author: Park, C.S.

Type: Article

Results 1-7 of 7 (Search time: 0.004 seconds).

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	Issue Date	Title	Author(s)
1	May-2003	An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer	Park, C.S. ; Cho, B.J. ; Kwong, D.-L.
2	Nov-2005	Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning	Park, C.S. ; Cho, B.J.
3	Sep-2004	Feasibility study of using thin aluminum nitride film as a buffer layer for dual metal gate process	Park, C.S. ; Cho, B.J. ; Balasubramanian, N.; Kwong, D.-L.
4	May-2006	Interface configuration and Fermi-level pinning of fully silicided gate and high-K dielectric stack	Joo, M.S. ; Park, C.S. ; Cho, B.J. ; Balasubramanian, N.; Kwong, D.-L.
5	Nov-2004	MOS characteristics of substituted Al gate on high-κ dielectric	Park, C.S. ; Cho, B.J. ; Kwong, D.-L.
6	Nov-2004	MOS characteristics of substituted Al gate on high-κ dielectric	Park, C.S. ; Cho, B.J. ; Kwong, D.-L.
7	Sep-2004	MOS Characteristics of synthesized HfAlON-HfO2 stack using AlN-HfO2	Park, C.S. ; Cho, B.J. ; Kwong, D.-L.