Please use this identifier to cite or link to this item:
|Title:||Band engineering in the high-k dielectrics gate stacks||Authors:||Wang, S.J.
High-k gate stacks
|Issue Date:||Sep-2007||Citation:||Wang, S.J., Dong, Y.F., Feng, Y.P., Huan, A.C.H. (2007-09). Band engineering in the high-k dielectrics gate stacks. Microelectronic Engineering 84 (9-10) : 2332-2335. ScholarBank@NUS Repository. https://doi.org/10.1016/j.mee.2007.04.050||Abstract:||In this report, the band alignment related issues for high-k gate stacks have been discussed and the band engineering has been studied by combinational characterization of in-situ x-ray photoemission spectroscopy (XPS), high resolution transmission electron microscopy (HRTEM) and first-principles calculations based on density functional theory (DFT). The results show that band alignments at metal-gate/high-κ interfaces can be engineered to satisfy the application for CMOS devices through the interface structure-control. © 2007 Elsevier B.V. All rights reserved.||Source Title:||Microelectronic Engineering||URI:||http://scholarbank.nus.edu.sg/handle/10635/95848||ISSN:||01679317||DOI:||10.1016/j.mee.2007.04.050|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.