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|Title:||A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm||Authors:||Hoo, C.H.
|Keywords:||Coarse-grained power gating
power-aware routing algorithm
|Issue Date:||2013||Citation:||Hoo, C.H.,Ha, Y.,Kumar, A. (2013). A directional coarse-grained power gated FPGA switch box and power gating aware routing algorithm. 2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings : -. ScholarBank@NUS Repository. https://doi.org/10.1109/FPL.2013.6645548||Abstract:||Leakage power has become an important component of the total power consumption in FPGAs as process technology shrinks. In addition, a significant amount of leakage power in FPGAs is consumed by the routing resources. Therefore, leakage power reduction in FPGAs should begin with the routing resources. In this paper, we propose a novel directional coarse-grained power gating architecture for switch boxes. In addition, the existing VPR routing algorithm has been adapted with a new cost function to support the new power gating architecture. Results have shown that the new cost function yields an average improvement of 22% as compared to the existing VPR cost function in terms of the number of power gating regions that can be turned off. © 2013 IEEE.||Source Title:||2013 23rd International Conference on Field Programmable Logic and Applications, FPL 2013 - Proceedings||URI:||http://scholarbank.nus.edu.sg/handle/10635/83346||DOI:||10.1109/FPL.2013.6645548|
|Appears in Collections:||Staff Publications|
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