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|Title:||100 nm Gate Length Pt-Germanosilicide Schottky S/D PMOSFET on SGOI substrate fabricated by novel condensation approach||Authors:||Gao, F.
|Issue Date:||2006||Citation:||Gao, F.,Balakumar, S.,Rui, L.,Lee, S.J.,Tung, C.-H.,Du, A.,Sudhiranjan, T.,Hwang, W.S.,Balasubramanian, N.,Lo, P.,Dong-Zhi, C.,Kwong, D.-L. (2006). 100 nm Gate Length Pt-Germanosilicide Schottky S/D PMOSFET on SGOI substrate fabricated by novel condensation approach. Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA : 311-313. ScholarBank@NUS Repository. https://doi.org/10.1109/IPFA.2006.251052||Abstract:||Single-crystalline SGOI substrate is achieved by multi-step oxidation of co-sputtered amorphous SiGe film on SOI substrate. Subsequently, SGOI PMOSFET using Pt-germanosilicide Schottky S/D and HfO2/TaN gate stack integrated with conventional self-aligned top gate process was demonstrated. Excellent performance of the SGOI PMOSFET is presented. © 2006 IEEE.||Source Title:||Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA||URI:||http://scholarbank.nus.edu.sg/handle/10635/83288||ISBN:||1424402069||DOI:||10.1109/IPFA.2006.251052|
|Appears in Collections:||Staff Publications|
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