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|Title:||A comprehensive study of indium implantation-induced damage in deep submicrometer nMOSFET: Device characterization and damage assessment||Authors:||Liao, H.
|Keywords:||Gate oxide integrity
Super-steep retrograde channel
|Issue Date:||Dec-2002||Citation:||Liao, H., Ang, D.S., Ling, C.H. (2002-12). A comprehensive study of indium implantation-induced damage in deep submicrometer nMOSFET: Device characterization and damage assessment. IEEE Transactions on Electron Devices 49 (12) : 2254-2262. ScholarBank@NUS Repository. https://doi.org/10.1109/TED.2002.805610||Abstract:||The impact of indium channel implantation on the current-voltage characteristics, gate oxide breakdown and hot-carrier reliability of deep submicrometer nMOSFETs is studied in detail. A significantly faster oxide wear-out during ramped-voltage testing and a distinctly enhanced drain current degradation during hot-carrier stressing are observed in devices with implant dose ranging from 1-2 × 1013 cm-2. An important generation leakage is also measured in the long-channel MOSFET, although such irregularity is normally not detected in short-channel devices owing to predominant subthreshold current. The loss in device reliability may be attributed to the generation of local amorphous regions in the channel when the implant dose exceeds 1013 cm-2. The limited thermal budget of the subsequent gate oxidation step is generally unable to anneal out these defects, which in turn lead to the formation of local weak spots and strained Si-H bonds in the gate oxide, and dislocation loops in the channel region. This finding raises an important concern on the use of indium implantation in retrograde channel engineering, since implant doses on the order of 1013 cm-2 are often needed for effective suppression of short-channel effects. In order to minimize the loss in device reliability, the damaged lattice would need to be restored using a dedicated thermal annealing cycle prior to gate oxidation. A good correlation between the hot-carrier stress data and the DC current-voltage (DCIV) measurement data is also presented. This makes the DCIV technique a precise, nondestructive monitor for implantation-induced damage in deep submicrometer MOSFET, via a direct measurement of the process-residue interface traps.||Source Title:||IEEE Transactions on Electron Devices||URI:||http://scholarbank.nus.edu.sg/handle/10635/81854||ISSN:||00189383||DOI:||10.1109/TED.2002.805610|
|Appears in Collections:||Staff Publications|
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