Quantum tunneling and scalability of HfO2 and HfAlO gate stacks

Abstract

We present a physical model for tunneling current through high-κ gate stack including the ultra thin interfacial layer between high-κ and Si substrate. The energy band offsets of high-κ are determined by XPS. The accurate carrier quantization in the substrate or gate is found to play a more significant role in tunneling through high-κ dielectric than in SiO2. Excellent agreements between simulated and measured tunneling currents were achieved over several high-κ dielectrics with both poly-Si and metal gate electrodes. The model is also applied to analyze the scalability of HfO2 and HfAlO gate stacks in future CMOS technology.