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|Title:||Application of a negative sweep voltage to control gate of fresh flash memory devices to facilitate threshold voltage test measurement||Authors:||Cha, C.L.
|Issue Date:||1998||Citation:||Cha, C.L.,Chor, E.F.,Gong, H.,Teo, T.H.,Zhang, A.Q.,Chan, L. (1998). Application of a negative sweep voltage to control gate of fresh flash memory devices to facilitate threshold voltage test measurement. IEEE International Conference on Conduction & Breakdown in Solid Dielectrics : 253-256. ScholarBank@NUS Repository.||Abstract:||The immediate threshold voltage (Vth) measurements conducted on fresh flash memory devices gained no definite results: the obtained cell drain current (Id) versus applied gate voltage (Vg) plots for the devices were oscillating and erratic. Suspected cause for this abnormal phenomenon arises from the random to-and-fro movements of the embedded positive charges present in the flash devices, across the reoxidized nitrided oxide (ONO) interpoly dielectric layer in the availability of electric fields. Application of a negative sweep voltage to the control gate of the fresh memory devices prior to the conduction of the Vth tests, however, seems to produce smooth Id vs Vg curve plots which yield repeatable as well as reasonable Vth values. The acquirement of such electrical results readily suggest the partial or full removal of the initial embedded positive charges, which were present in the devices as a result of charging from plasma exposure during the etching/implantation fabrication steps, by the applied gate potential.||Source Title:||IEEE International Conference on Conduction & Breakdown in Solid Dielectrics||URI:||http://scholarbank.nus.edu.sg/handle/10635/81378|
|Appears in Collections:||Staff Publications|
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