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|Title:||Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA||Authors:||Singh, A.K.
|Issue Date:||2010||Citation:||Singh, A.K.,Kumar, A.,Srikanthan, T.,Ha, Y. (2010). Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA. Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10 : 365-368. ScholarBank@NUS Repository. https://doi.org/10.1109/FPT.2010.5681427||Abstract:||Multiprocessor systems-on-chip (MPSoC) are required to fulfill the performance demand of modern real-life embedded applications. These MPSoCs are employing Network-on-Chip (NoC) for reasons of efficiency and scalability. Additionally, these systems need to support run-time reconfiguration of their components to cater to dynamically changing demands of the system. Designing and programming such systems for real-life applications prove to be a major challenge. This paper demonstrates the designing of reconfigurable NoC-based MPSoC and programming it for real-life applications. The NoC is reconfigured at run-time to support different combinations of multiple applications at different times. The platform is verified with a case study executing the parallelized C-codes of a simple producer-consumer and JPEG decoder applications on a NoC-based MPSoC on a Xilinx FPGA. Based on our investigations to map the applications on a 3×3 platform, we show that the NoC reconfiguration overhead is kept at a minimum and the platform utilizes 85% of the total available slices of Virtex-5 FPGA. Moreover, we show that the proposed approach is highly scalable when targeting for large number of applications. © 2010 IEEE.||Source Title:||Proceedings - 2010 International Conference on Field-Programmable Technology, FPT'10||URI:||http://scholarbank.nus.edu.sg/handle/10635/70883||ISBN:||9781424489817||DOI:||10.1109/FPT.2010.5681427|
|Appears in Collections:||Staff Publications|
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