Please use this identifier to cite or link to this item: https://doi.org/10.1109/16.740913
Title: An improved drain-current-conductance method with substrate back-biasing
Authors: Tan, C.B.
Chim, W.K. 
Chan, D.S.H. 
Lou, C.L.
Keywords: Body effect
Channel mobility
MOSFET
Parameter extraction
Series resistance
Issue Date: 1999
Citation: Tan, C.B., Chim, W.K., Chan, D.S.H., Lou, C.L. (1999). An improved drain-current-conductance method with substrate back-biasing. IEEE Transactions on Electron Devices 46 (2) : 431-433. ScholarBank@NUS Repository. https://doi.org/10.1109/16.740913
Abstract: A previously developed drain-current-conductance method (DCCM) is extended to investigate the effect of back-bias on LATID NMOSFET's. For the same effective gate overdrive, the extracted drain and source series resistances increase as the back-bias is increased. Twodimensional device simulation showed that the increased back-bias results in reduced current contour values at the drain/source regions as a result of the increase in the series resistances. © 1999 IEEE.
Source Title: IEEE Transactions on Electron Devices
URI: http://scholarbank.nus.edu.sg/handle/10635/61811
ISSN: 00189383
DOI: 10.1109/16.740913
Appears in Collections:Staff Publications

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