Dual-Mode Conversion Gating, Comparator Merging, and Reference-Less Calibration for 2.7× Energy Reduction in SAR ADCs Under Low-Activity Inputs

Abstract

This work introduces a SAR ADC architecture that reduces energy by skipping conversion whenever samples lie within a predefined activity window Δ of previous data conversion(s), while simultaneously providing an uncommonly flexible window for signal specificity exploitation and ample design reuse, minimally invasive design at system level, and suppressing any additional accurate circuitry for windowing. In detail, the proposed ADC has a uniquely flexible activity window (both center and width are tunable) and is adjustable, instead of having center/width rigidly set at design time and/or by fixed absolute thresholds. Also, the proposed ADC is minimally invasive at system level as: 1) it guarantees uniform sampling and conversion completion at every sample without missing samples and 2) it does not require any additional accurate circuitry, such as voltage reference or DAC. A reference-less calibration based on pulse counting is introduced to accurately set the activity window threshold with sub-LSB granularity. Comparator merging inherently compensates offset in normal conversions, reusing calibrated comparators used for ±Δ windowing. A 12-bit 40-nm ADC testchip with an energy FOM of 0.95 fJ/convstep shows 2.7× energy saving over a SAR baseline at 22% area overhead.