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https://doi.org/10.1109/JPROC.2016.2521712
Title: | Spin-Transfer Torque Memories: Devices, Circuits, and Systems | Authors: | Fong, Xuanyao Kim, Yusung Venkatesan, Rangharajan Choday, Sri Harsha Raghunathan, Anand Roy, Kaushik |
Keywords: | Science & Technology Technology Engineering, Electrical & Electronic Engineering Design of spin-transfer torque MRAM emerging nonvolatile memory technology magnetic tunnel junction nonvolatile on-chip caches MAGNETIC TUNNEL-JUNCTIONS STT-MRAM MICROMAGNETIC SIMULATION GIANT MAGNETORESISTANCE ROOM-TEMPERATURE ORBIT TORQUE RAM BIT POLARIZATION ANISOTROPY |
Issue Date: | 1-Jul-2016 | Publisher: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | Citation: | Fong, Xuanyao, Kim, Yusung, Venkatesan, Rangharajan, Choday, Sri Harsha, Raghunathan, Anand, Roy, Kaushik (2016-07-01). Spin-Transfer Torque Memories: Devices, Circuits, and Systems. PROCEEDINGS OF THE IEEE 104 (7) : 1449-1488. ScholarBank@NUS Repository. https://doi.org/10.1109/JPROC.2016.2521712 | Abstract: | © 2016 IEEE. Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent integration density, acceptable read and write performance, and compatibility with CMOS process technology. However, several obstacles need to be overcome for STT-MRAM to become the universal memory technology. This paper first reviews the fundamentals of STT-MRAM and discusses key experimental breakthroughs. The state of the art in STT-MRAM is then discussed, beginning with the device design concepts and challenges. The corresponding bit-cell design solutions are also presented, followed by the STT-MRAM cache architectures suitable for on-chip applications. | Source Title: | PROCEEDINGS OF THE IEEE | URI: | https://scholarbank.nus.edu.sg/handle/10635/156191 | ISSN: | 0018-9219 1558-2256 |
DOI: | 10.1109/JPROC.2016.2521712 |
Appears in Collections: | Staff Publications Elements |
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