Han Genquan
Email Address
elehg@nus.edu.sg
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Publication Electronic band structure and effective mass parameters of Ge 1-xSnx alloys(2012-11-15) Lu Low, K.; Yang, Y.; Han, G.; Fan, W.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGThis work investigates the electronic band structures of bulk Ge 1xSnx alloys using the empirical pseudopotential method (EPM) for Sn composition x varying from 0 to 0.2. The adjustable form factors of EPM were tuned in order to reproduce the band features that agree well with the reported experimental data. Based on the adjusted pseudopotential form factors, the band structures of Ge 1xSnx alloys were calculated along high symmetry lines in the Brillouin zone. The effective masses at the band edges were extracted by using a parabolic line fit. The bowing parameters of hole and electron effective masses were then derived by fitting the effective mass at different Sn compositions by a quadratic polynomial. The hole and electron effective mass were examined for bulk Ge1xSnx alloys along specific directions or orientations on various crystal planes. In addition, employing the effective-mass Hamiltonian for diamond semiconductor, band edge dispersion at the Γ-point calculated by 8-band k.p. method was fitted to that obtained from EPM approach. The Luttinger-like parameters were also derived for Ge1xSnx alloys. They were obtained by adjusting the effective-mass parameters of k.p method to fit the k.p band structure to that of the EPM. These effective masses and derived Luttinger parameters are useful for the design of optical and electronic devices based on Ge1xSnx alloys. © 2012 American Institute of Physics.Publication High-performance germanium ω-Gate MuGFET with schottky-barrier nickel germanide source/drain and low-temperature disilane-passivated gate stack(2012) Liu, B.; Gong, X.; Han, G.; Lim, P.S.Y.; Tong, Y.; Zhou, Q.; Yang, Y.; Daval, N.; Veytizou, C.; Delprat, D.; Nguyen, B.-Y.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGWe report high-performance p-channel $\Omega$-gate germanium (Ge) p-channel multigate field-effect transistor (MuGFET) with low-temperature Si{2}\hbox{H} 6 surface passivation and Schottky-barrier nickel germanide (NiGe) metallic source/drain, fabricated on high-quality germanium-on-insulator (GeOI) substrates using sub-400 $^{\circ}\hbox{C} $ process modules. As compared with other reported p-channel multigate Ge devices formed by top-down approaches, the Ge MuGFETs in this letter have a record-high on-state current $I \rm ON of $\sim \hbox{450}\ \mu\hbox{A}/\mu\hbox{m}$ at $V{\rm GS} -V{\rm TH} = -\hbox{1}\ \hbox{V}$ and $V{\rm DS} = -\hbox{1}\ \hbox{V}$. High peak intrinsic saturation transconductance of $\sim \hbox{740}\ \mu\hbox{S}/\mu\hbox{m}$ and low off-state current are reported. We also study the effect of fin or channel doping on Ge MuGFET performance. The simple MuGFET process developed using GeOI substrate would be a good reference for future 3-D Ge device fabrication. © 2012 IEEE.Publication (110)-oriented germanium-tin (Ge0.97Sn0.03) P-channel MOSFETs(2013) Zhan, C.; Wang, W.; Gong, X.; Guo, P.; Liu, B.; Yang, Y.; Han, G.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGWe report the first demonstration of germanium-tin (GeSn) p-channel MOSFETs fabricated on the (110) surface. A gate-last process was used for transistor fabrication. 8 nm of high quality GeSn film was epitaxially grown on Ge (110) substrate. A low temperature disilane (Si2H6) treatment was employed to passivate the GeSn surface prior to TaN/HfO2 gate stack formation. Subthreshold swing S of 113 mV/decade was achieved, the lowest reported for GeSn pMOSFETs. © 2013 IEEE.Publication High hole mobility in strained germanium-tin (GeSn) channel pMOSFET fabricated on (111) substrate(2012) Han, G.; Su, S.; Yang, Y.; Guo, P.; Gong, X.; Wang, L.; Wang, W.; Guo, C.; Zhang, G.; Xue, C.; Cheng, B.; Yeo, Y.C.; ELECTRICAL & COMPUTER ENGINEERINGWe report the demonstration of strained GeSn channel pMOSFETs on (111)- and (100)-oriented Ge substrates. The Sn composition is 4.1%. The device interface is passivated using (NH4)2S solution. Compared to devices on Ge(100), GeSn pMOSFETs on Ge(111) demonstrate a 20% enhancement in effective hole mobility at an inversion charge density (Qinv) of 2 × 10 13 cm-2. © The Electrochemical Society.Publication Germanium-tin + junction formed using phosphorus ion implant and 400 °c rapid thermal anneal(2012) Wang, L.; Su, S.; Wang, W.; Yang, Y.; Tong, Y.; Liu, B.; Guo, P.; Gong, X.; Zhang, G.; Xue, C.; Cheng, B.; Han, G.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGA Ge 0.976 Sn 0.024 n +/p diode was formed using phosphorus ion P + implant and rapid thermal annealing at 400 °C. Activation of P in Ge typically requires high temperatures (e.g., 700 °C), and it was found that this is not needed in the presence of a small amount of Sn. A high forward bias current of 320 A/cm 2 at-1 V is achieved for the Ge 0.976 Sn 0.024n +/diode. This is four times higher than that of the Ge n +/p control diode, which received the same P + implant but activated at 700 °C. The n +-GeSn region has a high active dopant concentration of 2.1 × \10 19cm -3, much higher than that in the Ge control. The increased active dopant concentration in GeSn reduces the width of the tunneling barrier between the Al contact and the n +-GeSn and increases the forward bias diode current. Enhancement of P activation in Ge 0.976 Sn 0.024 could possibly be as a result of passivation of vacancies in the Ge lattice due to Sn atoms. © 2012 IEEE.Publication Uniaxially strained germanium-tin (GeSn) gate-all-around nanowire PFETs enabled by a novel top-down nanowire formation technology(2013) Gong, X.; Han, G.; Su, S.; Cheng, R.; Guo, P.; Bai, F.; Yang, Y.; Zhou, Q.; Liu, B.; Goh, K.H.; Zhang, G.; Xue, C.; Cheng, B.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGWe report the first demonstration of gate-all-around (GAA) GeSn nanowire (NW) pFETs. The uniaxially compressive strained GeSn NW with a width of 50 nm and a height of 35 nm was fabricated using a CMOS compatible top-down approach. The GeSn GAA NW pFETs with the shortest reported channel length LCH down to 100 nm were realized, and the devices achieve a record high peak intrinsic transconductance Gm,int of 573 μS/μm at V DS of -1.0 V for GeSn pFETs. © 2013 JSAP.Publication Tunneling field-effect transistor (TFET) with novel Ge/In 0.53Ga0.47As tunneling junction(2012) Guo, P.; Yang, Y.; Cheng, Y.; Han, G.; Chia, C.K.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGIn this work, high quality epitaxial germanium (Ge) was successfully grown on In0.53Ga0.47As substrate using a metalorganic chemical vapor deposition (MOCVD) tool. The energy band alignment between the Ge layer and In0.53Ga0.47As was investigated using high-resolution x-ray photoelectron spectroscopy (XPS) and the valence band offset was determined to be 0.5 ± 0.1 eV. Therefore, Ge/In0.53Ga 0.47As heterojunction has a staggered band alignment at the interface, which is a good candidate for the tunneling junction in tunneling field-effect transistor (TFET). Lateral TFET with in situ doped P+ Ge-source In0.53Ga0.47As-channel using a gate-last process was demonstrated for the first time. © The Electrochemical Society.Publication Silicon-based tunneling field-effect transistor with elevated germanium source formed on (110) silicon substrate(2011-04-11) Han, G.; Guo, P.; Yang, Y.; Zhan, C.; Zhou, Q.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGSi-based tunneling field-effect transistors (TFETs) with elevated Ge source were fabricated on Si(110) substrate. The in situ B-doped Ge (Ge:B) source grown on Si(110) has a substitutional B concentration up to 7.8× 1020 cm-3, that is more than one order of magnitude higher than that in Ge grown on Si(100) under the same growth conditions. Ge:B epitaxy on (110) and (100) Si is discussed. The TFET with elevated Ge source formed on Si(110) has a subthreshold swing of 85 mV/decade, which is a substantial improvement over that of the control TFET formed on Si(100). This is attributed to the high B doping concentration in the Ge:B(110) source as well as the band gap narrowing effect. © 2011 American Institute of Physics.Publication Germanium multiple-gate field-effect transistors formed on germanium-on-insulator substrate(2013) Liu, B.; Gong, X.; Zhan, C.; Han, G.; Chin, H.-C.; Ling, M.-L.; Li, J.; Liu, Y.; Hu, J.; Daval, N.; Veytizou, C.; Delprat, D.; Nguyen, B.-Y.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGWe demonstrate the integration of high performance p-channel Germanium Multiple-Gate Field-Effect Transistors (MuGFETs) on a Germanium-on-Insulator substrate. Detailed process conditions are documented in this paper. The effects of Ge fin doping concentration on the electrical performance of Ge MuGFETs are discussed, and this could be useful for further device optimization. It is found that a higher fin doping leads to better control of short-channel efforts of Ge MuGFETs but degrades the on-state current and transconductance. High on-state current for Ge MuGFETs is reported in this paper. © 1963-2012 IEEE.Publication High-mobility germanium-tin (GeSn) P-channel MOSFETs featuring metallic source/drain and sub-370°C process modules(2011) Han, G.; Su, S.; Zhan, C.; Zhou, Q.; Yang, Y.; Wang, L.; Guo, P.; Wei, W.; Wong, C.P.; Shen, Z.X.; Cheng, B.; Yeo, Y.-C.; ELECTRICAL & COMPUTER ENGINEERINGWe report the first demonstration of GeSn pMOSFETs. Key highlights of this work also includes a 180 °C GeSn MBE growth, sub-370 °C Si 2H 6 surface passivation and gate stack process for GeSn, and an implantless metallic NiGeSn S/D formed at 350 °C. A hole mobility of 430 cm 2/Vs is obtained for GeSn pMOSFETs, which is 66% higher than that of the Ge control pMOSFETs. GeSn pMOSFETs show a 64% lower S/D resistance as compared to the Ge control devices. © 2011 IEEE.