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Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/99465
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dc.titleWafer packing for full mask exposure fabrication
dc.contributor.authorDu, D.
dc.contributor.authorLim, A.
dc.contributor.authorWu, C.-T.
dc.date.accessioned2014-10-27T06:04:25Z
dc.date.available2014-10-27T06:04:25Z
dc.date.issued1998-04-02
dc.identifier.citationDu, D.,Lim, A.,Wu, C.-T. (1998-04-02). Wafer packing for full mask exposure fabrication. Electronics Letters 34 (7) : 659-660. ScholarBank@NUS Repository.
dc.identifier.issn00135194
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/99465
dc.description.abstractThe authors formulate various models of the wafer packing problem, using a full mask exposure fabrication process, and propose a heuristic for the most general version of the problem. Experiments, on real test data, indicate that the heuristic is effective.
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentINFORMATION SYSTEMS & COMPUTER SCIENCE
dc.description.sourcetitleElectronics Letters
dc.description.volume34
dc.description.issue7
dc.description.page659-660
dc.description.codenELLEA
dc.identifier.isiutNOT_IN_WOS
Appears in Collections:Staff Publications

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