Please use this identifier to cite or link to this item:
https://doi.org/10.1002/9783527646340.ch9
| Title: | Interface Engineering in the High-k Dielectric Gate Stacks | Authors: | Wang, S. Feng, Y. Huan, A.C.H. |
Keywords: | Gate dielectric Heterojunction High-k dielectric material Keywords: band offset Metal/semiconductor interfaces Schottky barrier height |
Issue Date: | 23-Aug-2012 | Citation: | Wang, S.,Feng, Y.,Huan, A.C.H. (2012-08-23). Interface Engineering in the High-k Dielectric Gate Stacks. High-k Gate Dielectrics for CMOS Technology : 293-318. ScholarBank@NUS Repository. https://doi.org/10.1002/9783527646340.ch9 | Source Title: | High-k Gate Dielectrics for CMOS Technology | URI: | http://scholarbank.nus.edu.sg/handle/10635/98980 | ISBN: | 9783527330324 | DOI: | 10.1002/9783527646340.ch9 |
| Appears in Collections: | Staff Publications |
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