Please use this identifier to cite or link to this item:
|Title:||A novel DC-offset cancelling circuit for DCR||Authors:||Yan, J.
|Issue Date:||2005||Citation:||Yan, J.,Zheng, Y.,Xu, Y.P. (2005). A novel DC-offset cancelling circuit for DCR. Proceedings - IEEE International Symposium on Circuits and Systems : 396-399. ScholarBank@NUS Repository. https://doi.org/10.1109/ISCAS.2005.1464608||Abstract:||This paper describes a novel DC-offset canceling structure for Direct-Conversion Receiver (DCR). The proposed structure uses an I/Q tuning loop to remove DCoffset. I/Q mismatch issue is discussed and according solution to suppress I/Q mismatch effects is adopted. A variable bandwidth technique is employed to accelerate the loop acquisition when the system is first time turned on. Simulation results show that the differential DC-offset voltage is less than 3mV after the loop becomes locked when a DC-offset of 100mV is presented. Moreover, the tuning loop can efficiently suppress effects of I/Q mismatch. © 2005 IEEE.||Source Title:||Proceedings - IEEE International Symposium on Circuits and Systems||URI:||http://scholarbank.nus.edu.sg/handle/10635/83394||ISSN:||02714310||DOI:||10.1109/ISCAS.2005.1464608|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Feb 14, 2020
checked on Feb 16, 2020
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.