Please use this identifier to cite or link to this item: https://doi.org/10.1109/LED.2006.882569
DC FieldValue
dc.titleWork-function tuning of TaN by high-temperature metal intermixing technique for gate-first CMOS process
dc.contributor.authorRen, C.
dc.contributor.authorChan, D.S.H.
dc.contributor.authorLoh, W.Y.
dc.contributor.authorBalakumar, S.
dc.contributor.authorDu, A.Y.
dc.contributor.authorTung, C.H.
dc.contributor.authorLo, G.Q.
dc.contributor.authorKumar, R.
dc.contributor.authorBalasubramanian, N.
dc.contributor.authorKwong, D.-L.
dc.date.accessioned2014-10-07T04:39:27Z
dc.date.available2014-10-07T04:39:27Z
dc.date.issued2006
dc.identifier.citationRen, C., Chan, D.S.H., Loh, W.Y., Balakumar, S., Du, A.Y., Tung, C.H., Lo, G.Q., Kumar, R., Balasubramanian, N., Kwong, D.-L. (2006). Work-function tuning of TaN by high-temperature metal intermixing technique for gate-first CMOS process. IEEE Electron Device Letters 27 (10) : 811-813. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2006.882569
dc.identifier.issn07413106
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/83280
dc.description.abstractThis letter investigates the feasibility of adjusting the work function (WF) of TaN metal gate by intermixing (InM) of ultra-thin TaN/Metal stacks at high temperature. This could be useful for the integration of dual-WF metal gates in a gate-first CMOS process without exposing gate dielectric during metal-etching process. TaN/Tb and TaN/Ir stacks were studied, and it is found that the WF of TaN can be readily modulated through metal InM in TaN/Tb stack after high-temperature treatment (∼1000°C), which simulates the source/drain dopant activation process in a gate-first CMOS process. Factors affecting the InM process will be discussed. Successful transistor threshold voltage adjustment by ∼300 mV on high-kappa HfTaON/HfO2 dielectrics has also been demonstrated in TaN/Tb stack using this technique. © 2006 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2006.882569
dc.sourceScopus
dc.subjectCMOS
dc.subjectDual work function (WF)
dc.subjectGate first
dc.subjectIntermixing (InM)
dc.subjectMetal gate
dc.typeArticle
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/LED.2006.882569
dc.description.sourcetitleIEEE Electron Device Letters
dc.description.volume27
dc.description.issue10
dc.description.page811-813
dc.description.codenEDLED
dc.identifier.isiut000240925900007
Appears in Collections:Staff Publications

Show simple item record
Files in This Item:
There are no files associated with this item.

SCOPUSTM   
Citations

6
checked on May 19, 2022

WEB OF SCIENCETM
Citations

6
checked on May 12, 2022

Page view(s)

120
checked on May 12, 2022

Google ScholarTM

Check

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.