Please use this identifier to cite or link to this item:
https://doi.org/10.1109/LED.2006.882569
DC Field | Value | |
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dc.title | Work-function tuning of TaN by high-temperature metal intermixing technique for gate-first CMOS process | |
dc.contributor.author | Ren, C. | |
dc.contributor.author | Chan, D.S.H. | |
dc.contributor.author | Loh, W.Y. | |
dc.contributor.author | Balakumar, S. | |
dc.contributor.author | Du, A.Y. | |
dc.contributor.author | Tung, C.H. | |
dc.contributor.author | Lo, G.Q. | |
dc.contributor.author | Kumar, R. | |
dc.contributor.author | Balasubramanian, N. | |
dc.contributor.author | Kwong, D.-L. | |
dc.date.accessioned | 2014-10-07T04:39:27Z | |
dc.date.available | 2014-10-07T04:39:27Z | |
dc.date.issued | 2006 | |
dc.identifier.citation | Ren, C., Chan, D.S.H., Loh, W.Y., Balakumar, S., Du, A.Y., Tung, C.H., Lo, G.Q., Kumar, R., Balasubramanian, N., Kwong, D.-L. (2006). Work-function tuning of TaN by high-temperature metal intermixing technique for gate-first CMOS process. IEEE Electron Device Letters 27 (10) : 811-813. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2006.882569 | |
dc.identifier.issn | 07413106 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/83280 | |
dc.description.abstract | This letter investigates the feasibility of adjusting the work function (WF) of TaN metal gate by intermixing (InM) of ultra-thin TaN/Metal stacks at high temperature. This could be useful for the integration of dual-WF metal gates in a gate-first CMOS process without exposing gate dielectric during metal-etching process. TaN/Tb and TaN/Ir stacks were studied, and it is found that the WF of TaN can be readily modulated through metal InM in TaN/Tb stack after high-temperature treatment (∼1000°C), which simulates the source/drain dopant activation process in a gate-first CMOS process. Factors affecting the InM process will be discussed. Successful transistor threshold voltage adjustment by ∼300 mV on high-kappa HfTaON/HfO2 dielectrics has also been demonstrated in TaN/Tb stack using this technique. © 2006 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/LED.2006.882569 | |
dc.source | Scopus | |
dc.subject | CMOS | |
dc.subject | Dual work function (WF) | |
dc.subject | Gate first | |
dc.subject | Intermixing (InM) | |
dc.subject | Metal gate | |
dc.type | Article | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/LED.2006.882569 | |
dc.description.sourcetitle | IEEE Electron Device Letters | |
dc.description.volume | 27 | |
dc.description.issue | 10 | |
dc.description.page | 811-813 | |
dc.description.coden | EDLED | |
dc.identifier.isiut | 000240925900007 | |
Appears in Collections: | Staff Publications |
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