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|Title:||Reduction of carrier depletion in p+ polysilicon gates using laser thermal processing||Authors:||Chong, Y.F.
Laser thermal processing
|Issue Date:||May-2003||Citation:||Chong, Y.F., Gossmann, H.-J.L., Thompson, M.O., Pey, K.L., Wee, A.T.S., Talwar, S., Chan, L. (2003-05). Reduction of carrier depletion in p+ polysilicon gates using laser thermal processing. IEEE Electron Device Letters 24 (5) : 360-362. ScholarBank@NUS Repository. https://doi.org/10.1109/LED.2003.812578||Abstract:||A novel laser thermal processing (LTP) technique was used to fabricate p+-gated MOS capacitors with ultrathin gate oxides. It is found that the introduction of LTP prior to the gate activation anneal increases the carrier concentration at the poly-Si gate/gate oxide interface substantially, as compared to rapid thermal anneal (RTA) alone. Thus, LTP readily reduces the poly-depletion effect in p+-poly-Si gates. This is achieved without observable gate oxide degradation or boron penetration. Secondary ion mass spectrometry analyzes show that the boron concentration near the gate/gate oxide interface increases significantly after the post-LTP anneal. A possible mechanism for this increase in carrier concentration is the diffusion of boron atoms toward the gate oxide by a complex process known as explosive crystallization.||Source Title:||IEEE Electron Device Letters||URI:||http://scholarbank.nus.edu.sg/handle/10635/82970||ISSN:||07413106||DOI:||10.1109/LED.2003.812578|
|Appears in Collections:||Staff Publications|
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