Please use this identifier to cite or link to this item:
|Title:||Tackling the drop impact reliability of electronic packaging||Authors:||Wong, E.H.
|Issue Date:||2003||Citation:||Wong, E.H.,Lim, C.T.,Field, J.E.,Tan, V.B.C.,Shim, V.P.W.,Lim, K.M.,Seah, S.K.W. (2003). Tackling the drop impact reliability of electronic packaging. Advances in Electronic Packaging 1 : 757-763. ScholarBank@NUS Repository.||Abstract:||A 3-year collaboration program between the Institute of Microelectronics, National University of Singapore, and the University of Cambridge has been established with the following two objectives: (i) to establish a mechanics and physics-of-failure based board-level test methodology; (ii) to establish design guidelines and, ultimately, failure criteria for board level interconnect during drop/impact test. The following accomplishments have been achieved in the first year of the program: (i) the mechanics and physics of failure in a typical board-level test have been established (ii) the drop impact characteristics of 6 commercial portable products have been comprehensively surveyed; (iii) a weakness has been identified in the drop impact strength of SnAgCu solder alloy (acknowledged as the leading Pb-free solder candidate).||Source Title:||Advances in Electronic Packaging||URI:||http://scholarbank.nus.edu.sg/handle/10635/73913||ISBN:||0791836908|
|Appears in Collections:||Staff Publications|
Show full item record
Files in This Item:
There are no files associated with this item.
checked on Jan 10, 2021
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.