Please use this identifier to cite or link to this item:
https://doi.org/10.1109/VLSIT.2008.4588553
DC Field | Value | |
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dc.title | Performance breakthrough in 8 nm gate length gate-all-around nanowire transistors using metallic nanowire contacts | |
dc.contributor.author | Jiang, Y. | |
dc.contributor.author | Liow, T.Y. | |
dc.contributor.author | Singh, N. | |
dc.contributor.author | Tan, L.H. | |
dc.contributor.author | Lo, G.Q. | |
dc.contributor.author | Chan, D.S.H. | |
dc.contributor.author | Kwong, D.L. | |
dc.date.accessioned | 2014-06-19T03:23:18Z | |
dc.date.available | 2014-06-19T03:23:18Z | |
dc.date.issued | 2008 | |
dc.identifier.citation | Jiang, Y.,Liow, T.Y.,Singh, N.,Tan, L.H.,Lo, G.Q.,Chan, D.S.H.,Kwong, D.L. (2008). Performance breakthrough in 8 nm gate length gate-all-around nanowire transistors using metallic nanowire contacts. Digest of Technical Papers - Symposium on VLSI Technology : 34-35. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSIT.2008.4588553" target="_blank">https://doi.org/10.1109/VLSIT.2008.4588553</a> | |
dc.identifier.isbn | 9781424418053 | |
dc.identifier.issn | 07431562 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/71399 | |
dc.description.abstract | Parasitic S/D resistances in extremely scaled GAA nanowire devices can pathologically limit the device drive current performance. We demonstrate for the first time, that S/D extension dopant profile engineering together with successful integration of low resistivity metallic nanowire contacts greatly reduces parasitic resistances. This allows 8nm gate length GAA nanowire devices in this work to attain record-high drive currents of 3740μA/μm. © 2008 IEEE. | |
dc.description.uri | http://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSIT.2008.4588553 | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | ELECTRICAL & COMPUTER ENGINEERING | |
dc.description.doi | 10.1109/VLSIT.2008.4588553 | |
dc.description.sourcetitle | Digest of Technical Papers - Symposium on VLSI Technology | |
dc.description.page | 34-35 | |
dc.description.coden | DTPTE | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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