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Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSIT.2010.5556240
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dc.titleIII-V MOSFETs with a new self-aligned contact
dc.contributor.authorZhang, X.
dc.contributor.authorGuo, H.
dc.contributor.authorKo, C.-H.
dc.contributor.authorWann, C.H.
dc.contributor.authorCheng, C.-C.
dc.contributor.authorLin, H.-Y.
dc.contributor.authorChin, H.-C.
dc.contributor.authorGong, X.
dc.contributor.authorLim, P.S.Y.
dc.contributor.authorLuo, G.-L.
dc.contributor.authorChang, C.-Y.
dc.contributor.authorChien, C.-H.
dc.contributor.authorHan, Z.-Y.
dc.contributor.authorHuang, S.-C.
dc.contributor.authorYeo., Y.-C.
dc.date.accessioned2014-06-19T03:13:03Z
dc.date.available2014-06-19T03:13:03Z
dc.date.issued2010
dc.identifier.citationZhang, X.,Guo, H.,Ko, C.-H.,Wann, C.H.,Cheng, C.-C.,Lin, H.-Y.,Chin, H.-C.,Gong, X.,Lim, P.S.Y.,Luo, G.-L.,Chang, C.-Y.,Chien, C.-H.,Han, Z.-Y.,Huang, S.-C.,Yeo., Y.-C. (2010). III-V MOSFETs with a new self-aligned contact. Digest of Technical Papers - Symposium on VLSI Technology : 233-234. ScholarBank@NUS Repository. <a href="https://doi.org/10.1109/VLSIT.2010.5556240" target="_blank">https://doi.org/10.1109/VLSIT.2010.5556240</a>
dc.identifier.isbn9781424476374
dc.identifier.issn07431562
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/70519
dc.description.abstractWe report the first demonstration of III-V n-MOSFETs with self-aligned contact technology. The self-aligned contact was formed using a salicide-like process which is compatible with CMOS process flow. A new epitaxy process was developed to selectively form a thin continuous germanium-silicon (GeSi) layer on gallium arsenide (GaAs) source and drain (S/D) regions. Nickel was deposited and annealed to form NiGeSi, and unreacted metal was removed. A second anneal diffuses Ge and Si into GaAs to form heavily n+ doped regions, and a novel self-aligned nickel germanosilicide (NiGeSi) ohmic contact was achieved. MOSFETs with the new self-aligned metallization process were realized. © 2010 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSIT.2010.5556240
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/VLSIT.2010.5556240
dc.description.sourcetitleDigest of Technical Papers - Symposium on VLSI Technology
dc.description.page233-234
dc.description.codenDTPTE
dc.identifier.isiutNOT_IN_WOS
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