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|Title:||Circuit model of elastomer probe for fine pitch wafer level package test applications||Authors:||Jayabalan, J.
|Issue Date:||2005||Citation:||Jayabalan, J.,Ooi, B.L.,Leong, M.S.,Iyer, M.K. (2005). Circuit model of elastomer probe for fine pitch wafer level package test applications. Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005 1 : 175-178. ScholarBank@NUS Repository.||Abstract:||A novel elastomer probe meant for wafer level packaged device test applications at multi-gigahertz frequencies given tight mechanical constraints such as very fine pitch (of the order of 100 micron) and large pin count (of thousands per square centimeter) is modeled by partial element equivalent circuit (PEEC) method. The model is verified through insertion loss and return loss measurements on a prototype coplanar probe. © 2005 IEEE.||Source Title:||Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005||URI:||http://scholarbank.nus.edu.sg/handle/10635/69603||ISBN:||0780395786|
|Appears in Collections:||Staff Publications|
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