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|Title:||A 52 pJ/bit ook transmitter with adaptable data rate||Authors:||Raja, M.K.
|Issue Date:||2008||Citation:||Raja, M.K.,Xu, Y.P. (2008). A 52 pJ/bit ook transmitter with adaptable data rate. Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008 : 341-344. ScholarBank@NUS Repository. https://doi.org/10.1109/ASSCC.2008.4708797||Abstract:||A 433-MHz OOK transmitter with adaptable data rate is presented. The proposed circuit completely turns off the transmitter during the transmission of '0' and employs a speedup scheme to obtain high data rates and low wake up time. The data rate can be adjusted and adapted to the need of applications. Realized in a 0.35-μm CMOS technology, the OOK transmitter has a measured output power of -12.7dBm with a dc power consumption of 560 fiW under a 1-V power supply, and a data rate of 3 Mb/s, yielding an energy efficiency of 187 pJ/bit or 3.48 nJ/bit/mW if normalized to the transmitting power. When the proposed speed-up circuitry is enabled, data rate increases to 10 Mb/s, with a dc power consumption of 518 fiW achieving an energy efficiency of 52 pJ/bit or 0.97 nJ/bit/mW when normalized.©2008 IEEE.||Source Title:||Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008||URI:||http://scholarbank.nus.edu.sg/handle/10635/68712||ISBN:||9781424426058||DOI:||10.1109/ASSCC.2008.4708797|
|Appears in Collections:||Staff Publications|
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