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|Title:||Imporved algorithms for low power multiplexor decomposition||Authors:||Yang, S.
|Issue Date:||2004||Citation:||Yang, S.,Leong, H.W. (2004). Imporved algorithms for low power multiplexor decomposition. 10th International Symposium on Integrated Circuits, Devices and Systems, ISIC-2004: Integrated Systems on Silicon - Proceedings : 467-470. ScholarBank@NUS Repository.||Abstract:||It has been estimated that multiplexors (MUXes) make up a major portion of the circuitry in a typical chip. Therefore, to reduce power consumption of a chip, it is important to consider the problem of low power design of MUXes. This problem is called the low power MUX decomposition problem and has been studied in . This paper improves on the result of  in two ways: (a) we propose a method to speed-up the algorithms in  (by factors of up to 7.1 for 64-to-1 MUXes), and (b) we propose a post optimization procedure to further reduce the overall power dissipation of the decomposition obtained by  or any other MUX decomposition algorithms. Using this procedure, we have been able to further reduce the power dissipation results of .||Source Title:||10th International Symposium on Integrated Circuits, Devices and Systems, ISIC-2004: Integrated Systems on Silicon - Proceedings||URI:||http://scholarbank.nus.edu.sg/handle/10635/41641||ISBN:||9810517874|
|Appears in Collections:||Staff Publications|
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