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https://scholarbank.nus.edu.sg/handle/10635/41641
DC Field | Value | |
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dc.title | Imporved algorithms for low power multiplexor decomposition | |
dc.contributor.author | Yang, S. | |
dc.contributor.author | Leong, H.W. | |
dc.date.accessioned | 2013-07-04T08:32:16Z | |
dc.date.available | 2013-07-04T08:32:16Z | |
dc.date.issued | 2004 | |
dc.identifier.citation | Yang, S.,Leong, H.W. (2004). Imporved algorithms for low power multiplexor decomposition. 10th International Symposium on Integrated Circuits, Devices and Systems, ISIC-2004: Integrated Systems on Silicon - Proceedings : 467-470. ScholarBank@NUS Repository. | |
dc.identifier.isbn | 9810517874 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/41641 | |
dc.description.abstract | It has been estimated that multiplexors (MUXes) make up a major portion of the circuitry in a typical chip. Therefore, to reduce power consumption of a chip, it is important to consider the problem of low power design of MUXes. This problem is called the low power MUX decomposition problem and has been studied in [3]. This paper improves on the result of [3] in two ways: (a) we propose a method to speed-up the algorithms in [3] (by factors of up to 7.1 for 64-to-1 MUXes), and (b) we propose a post optimization procedure to further reduce the overall power dissipation of the decomposition obtained by [3] or any other MUX decomposition algorithms. Using this procedure, we have been able to further reduce the power dissipation results of [3]. | |
dc.source | Scopus | |
dc.type | Conference Paper | |
dc.contributor.department | COMPUTER SCIENCE | |
dc.description.sourcetitle | 10th International Symposium on Integrated Circuits, Devices and Systems, ISIC-2004: Integrated Systems on Silicon - Proceedings | |
dc.description.page | 467-470 | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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