Please use this identifier to cite or link to this item: https://scholarbank.nus.edu.sg/handle/10635/218956
Title: A Wafer Scale Hybrid Integration Platform for Co-packaged Photonics using a CMOS based Optical Interposer
Authors: BAOCHANG XU
YU ZHANG
VOON YEW THEAN
YEOW KHENG LIM 
Issue Date: 1-Apr-2022
Publisher: VLSI Symposium
Citation: BAOCHANG XU, YU ZHANG, VOON YEW THEAN, YEOW KHENG LIM (2022-04-01). A Wafer Scale Hybrid Integration Platform for Co-packaged Photonics using a CMOS based Optical Interposer. ScholarBank@NUS Repository.
Rights: CC0 1.0 Universal
Abstract: In this paper, we present a unique hybrid integration platform for wafer scale passive assembly of electronics and photonics devices using a CMOS based Optical Interposer. Our optical interposer enables seamless communications between electronics and photonics chips that are assembled on it using visually assisted passive flip chip bonding techniques. This unique integration platform is the first such platform in the industry adapted to directly modulated lasers and enables the world’s smallest single chip Transmit/Receive Optical engine for 100G-400G optical engines.
URI: https://scholarbank.nus.edu.sg/handle/10635/218956
Rights: CC0 1.0 Universal
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