Please use this identifier to cite or link to this item: https://doi.org/10.1109/TCSII.2020.3033253
Title: A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter
Authors: LUIGI FASSIO 
Francesco Settino
LIN LONGYANG 
Raffaele De Rose
Marco Lanuzza
Felice Crupi
ALIOTO,MASSIMO BRUNO 
Issue Date: 22-Oct-2020
Publisher: IEEE
Citation: LUIGI FASSIO, Francesco Settino, LIN LONGYANG, Raffaele De Rose, Marco Lanuzza, Felice Crupi, ALIOTO,MASSIMO BRUNO (2020-10-22). A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter. IEEE Transactions on Circuits and Systems II: Express Briefs 68 (4) : 1393 - 1397. ScholarBank@NUS Repository. https://doi.org/10.1109/TCSII.2020.3033253
Rights: CC0 1.0 Universal
Abstract: This brief presents a robust level shifter design able to convert input voltages from the deep sub-threshold regime (about 100 mV) up to the nominal supply voltage (1.8 V). The proposed circuit is based on a self-biased low-voltage cascode current mirror (CM) topology that features diode-connected PMOS and NMOS transistors to drive the split-input inverting buffer used as output stage with high energy efficiency. Experimental results across corner wafers demonstrate the effectiveness of the proposed level shifter as compared to prior art. The proposed circuit allows a voltage up-conversion from a 0.4-V 100-kHz input pulse to 1.8 V with an average switching delay of 7.6 ns and an average energy per transition of only 69 fJ. This is achieved at an area of 82 μm2 for a standard cell-based design.
Source Title: IEEE Transactions on Circuits and Systems II: Express Briefs
URI: https://scholarbank.nus.edu.sg/handle/10635/189168
DOI: 10.1109/TCSII.2020.3033253
Rights: CC0 1.0 Universal
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