QUARTER-MICRON PROCESS SIMULATION AND LDD STRUCTURE OPTIMIZATION

Abstract

The quarter-micron process is simulated using the two-dimensional process simulator TSUPREM4. The simulated device structure and dopant distribution are presented. Some major features of the quarter-micron process are discussed in detail. The moment parameters of dual-Pearson functions, which model one-dimensional implant profiles, are calibrated using a statistical analysis method. The lightly doped drain (LDD) structure is modified to the large angle tilt implanted drain (LATID) structure for the quarter-micron device. Process parameters related to LATID are optimized. Short-channel effects and hot carrier reliability are examined for different LDD schemes. The LATID structure can improve device lifetime but degrade short-channel effects. Devices with arsenic LATID and boron pocket implants exhibit suppressed short-channel roll-off without degradation of drive current and hot carrier reliability.