Maximizing Limited Resources: a Limit-Based Study and Taxonomy of Out-of-Order Commit
Alipour, M Carlson, T.E
Black-Schaffer, D Kaxiras, S
Alipour, M
Black-Schaffer, D
Kaxiras, S
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Abstract
Out-of-order execution is essential for high performance, general-purpose computation, as it can find and execute useful work instead of stalling. However, it is typically limited by the requirement of visibly sequential, atomic instruction execution—in other words, in-order instruction commit. While in-order commit has a number of advantages, such as providing precise interrupts and avoiding complications with the memory consistency model, it requires the core to hold on to resources (reorder buffer entries, load/store queue entries, physical registers) until they are released in program order. In contrast, out-of-order commit can release some resources much earlier, yielding improved performance and/or lower resource requirements. Non-speculative out-of-order commit is limited in terms of correctness by the conditions described in the work of Bell and Lipasti (2004). In this paper we revisit out-of-order commit by examining the potential performance benefits of lifting these conditions one by one and in combination, for both non-speculative and speculative out-of-order commit. While correctly handling recovery for all out-of-order commit conditions currently requires complex tracking and expensive checkpointing, this work aims to demonstrate the potential for selective, speculative out-of-order commit using an oracle implementation without speculative rollback costs. Through this analysis of the potential of out-of-order commit, we learn that: a) there is significant untapped potential for aggressive variants of out-of-order commit; b) it is important to optimize the out-of-order commit depth for a balanced design, as smaller cores benefit from reduced depth while larger cores continue to benefit from deeper designs; c) the focus on implementing only a subset of the out-of-order commit conditions could lead to efficient implementations; d) the benefits of out-of-order commit increases with higher memory latency and in conjunction with prefetching; e) out-of-order commit exposes additional parallelism in the memory hierarchy. © 2018, The Author(s).
Keywords
Hardware, Information systems, Efficient implementation, General-purpose computations, Memory consistency models, Memory hierarchy, Out of order, Out-of-order execution, Performance evaluations, Superscalar Processor, Memory architecture
Source Title
Journal of Signal Processing Systems
Publisher
Series/Report No.
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Rights
Attribution 4.0 International
Date
2019
DOI
10.1007/s11265-018-1369-4
Type
Article