STT-MRAMs for Future Universal Memories: Perspective and Prospective
Augustine, Charles Mojumder, Niladri Fong, Xuanyao Choday, Harsha Park, Sang Phill Roy, Kaushik
Augustine, Charles
Mojumder, Niladri
Choday, Harsha
Park, Sang Phill
Roy, Kaushik
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Abstract
Electron-spin based data storage for on-chip memories has the potential for ultra-high density, low-power consumption, very high endurance, and reasonably low read/write latency. In this article, we analyze the energy-performance characteristics of a state-of-the-art spin-transfer-torque based magnetic random access memories (STT-MRAM) bit-cell in the presence of parametric process variations. In order to realize ultra low power under process variations, we propose device and bit-cell level design techniques. Such design methods at various levels of design abstraction has been found to achieve substantially enhanced robustness, density, reliability and low power as compared to their charge-based counterparts for future embedded applications. © 2012 IEEE.
Keywords
Science & Technology, Technology, Engineering, Electrical & Electronic, Nanoscience & Nanotechnology, Engineering, Science & Technology - Other Topics, Spin-transfer torque, MTJ, memory, low power, parametric process variations, scaling, MAGNETIC TUNNEL-JUNCTIONS, DESIGN
Source Title
28th International Conference on Microelectronics (MIEL)
Publisher
IEEE
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Date
2012-01-01
DOI
10.1109/MIEL.2012.6222872
Type
Conference Paper