Please use this identifier to cite or link to this item: https://doi.org/10.1049/el:19990788
DC FieldValue
dc.titleMethod for determining the source and drain resistance of double heterojunction δ-doped PHEMTs
dc.contributor.authorRao, R.V.V.V.J.
dc.contributor.authorJoe, J.
dc.contributor.authorChia, Y.W.M.
dc.contributor.authorAng, K.S.
dc.contributor.authorNg, G.I.
dc.date.accessioned2014-11-28T04:59:07Z
dc.date.available2014-11-28T04:59:07Z
dc.date.issued1999-07-08
dc.identifier.citationRao, R.V.V.V.J., Joe, J., Chia, Y.W.M., Ang, K.S., Ng, G.I. (1999-07-08). Method for determining the source and drain resistance of double heterojunction δ-doped PHEMTs. Electronics Letters 35 (14) : 1198-1200. ScholarBank@NUS Repository. https://doi.org/10.1049/el:19990788
dc.identifier.issn00135194
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/112266
dc.description.abstractThe source and drain resistances (Rs and Rd) of PHEMTs have been determined by de-embedding the S-parameters of PHEMTs measured at a forward gate bias voltage and zero drain bias voltage using external parasitic elements. External parasitic elements were determined from S-parameters of on-wafer shorts and S-parameters of PHEMTs measured at a pinch-off gate bias voltage and zero drain bias voltage.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1049/el:19990788
dc.sourceScopus
dc.typeArticle
dc.contributor.departmentCENTRE FOR WIRELESS COMMUNICATIONS
dc.description.doi10.1049/el:19990788
dc.description.sourcetitleElectronics Letters
dc.description.volume35
dc.description.issue14
dc.description.page1198-1200
dc.description.codenELLEA
dc.identifier.isiut000082031900054
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