Jayasanker Jayabalan

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Full Name

(not current staff)

Variants

Jayabalan, J.

Main Affiliation

MECHANICAL ENGINEERING

Faculty

COLLEGE OF DESIGN AND ENGINEERING

mpejj@nus.edu.sg

Refined By:

Department: ELECTRICAL AND COMPUTER ENGINEERING

Author: Leong, M.-S.

Results 1-6 of 6 (Search time: 0.006 seconds).

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	Issue Date	Title	Author(s)
1	20-Apr-2005	A methodology for accurate modeling of a pad structure from S-parameter measurements	Jayabalan, J. ; Ooi, B.L. ; Wu, B. ; Xu, D.S.; Iyer, M.K.; Leong, M.S.
2	May-2004	A scaling technique for partial element equivalent circuit analysis using SPICE	Jayabalan, J. ; Leong, O.B.; Seng, L.M. ; Iyer, M.K.
3	2005	Circuit model of elastomer probe for fine pitch wafer level package test applications	Jayabalan, J. ; Ooi, B.L. ; Leong, M.S. ; Iyer, M.K.
4	Apr-2006	Novel circuit model for three-dimensional geometries with multilayer dielectrics	Jayabalan, J. ; Ooi, B.-L. ; Leong, M.-S. ; Iyer, M.K.
5	2005	PEEC model for multiconductor systems including dielectric mesh	Jayabalan, J. ; Ooi, B.L. ; Irene, A.; Leong, M.S. ; Iyer, M.K.
6	2004	Test bench modeling and characterization for fine pitch wafer level packaged devices	Jayabalan, J. ; Mihai, R.D.; Tan, J.P.H.; Iyer, M.K.; Leong, O.B.; Seng, L.M.