Please use this identifier to cite or link to this item: https://doi.org/10.1116/1.3025909
Title: Enhancement mode GaAs metal-oxide-semiconductor field-effect-transistor integrated with thin AlN surface passivation layer and silicon/phosphorus coimplanted source/drain
Authors: Gao, F.
Lee, S.J. 
Kwong, D.L.
Issue Date: 2009
Source: Gao, F., Lee, S.J., Kwong, D.L. (2009). Enhancement mode GaAs metal-oxide-semiconductor field-effect-transistor integrated with thin AlN surface passivation layer and silicon/phosphorus coimplanted source/drain. Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures 27 (1) : 214-217. ScholarBank@NUS Repository. https://doi.org/10.1116/1.3025909
Abstract: By using thin AlN film as a passivation layer between the GaAs and Hf O2, GaAs metal-oxide-semiconductor (MOS) devices exhibited well-behaved accumulation and inversion capacitance-voltage characteristics with low leakage current of 6× 10-5 A cm2 at Vg =1 V and interface state density of ∼4.9× 1010 cm-2 eV-1. In order to improve the N+ source/drain activation efficiency, the SiP coimplantation technique was adapted to fabricate GaAs n -type metal-oxide-semiconductor field-effect-transistor (MOSFET). High quality N+ P GaAs junction was achieved with extremely low junction leakage current of 3× 10-6 A cm2 at reverse bias of 1 V and high forward current to reverse current ratio of Iforward Ireverse ∼ 107 at GaAs source/drain junction. GaAs n -MOSFETs integrated with Hf O2 gate dielectric and TaN gate electrode were fabricated by using AlN passivation layer and SiP coimplantation techniques. The results show that our GaAs n -MOSFETs operate in enhancement mode with Ion Ioff ratio of approximately six orders and good transfer and output characteristics. © 2009 American Vacuum Society.
Source Title: Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
URI: http://scholarbank.nus.edu.sg/handle/10635/55890
ISSN: 10711023
DOI: 10.1116/1.3025909
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