Please use this identifier to cite or link to this item:
https://doi.org/10.1088/0957-4484/18/30/305306
DC Field | Value | |
---|---|---|
dc.title | Patterned micropads made of copper nanowires on silicon substrate for application as chip to substrate interconnects | |
dc.contributor.author | Sharma, G. | |
dc.contributor.author | Chong, C.S. | |
dc.contributor.author | Ebin, L. | |
dc.contributor.author | Kripesh, V. | |
dc.contributor.author | Gan, C.L. | |
dc.contributor.author | Sow, C.H. | |
dc.date.accessioned | 2014-10-16T09:36:01Z | |
dc.date.available | 2014-10-16T09:36:01Z | |
dc.date.issued | 2007-08-08 | |
dc.identifier.citation | Sharma, G., Chong, C.S., Ebin, L., Kripesh, V., Gan, C.L., Sow, C.H. (2007-08-08). Patterned micropads made of copper nanowires on silicon substrate for application as chip to substrate interconnects. Nanotechnology 18 (30) : -. ScholarBank@NUS Repository. https://doi.org/10.1088/0957-4484/18/30/305306 | |
dc.identifier.issn | 09574484 | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/97502 | |
dc.description.abstract | Patterned micropads made of metallic nanowires, 50 μm in diameter, are fabricated on a silicon substrate. An aluminium film patterned with SiO 2 is anodized to fabricate a patterned nanoporous alumina (PNA) template in which metallic nanowires are electrodeposited. SiO2 that is deposited using the plasma-enhanced chemical vapour deposition process is demonstrated to be an effective barrier to anodization for the fabrication of high aspect ratio PNA templates. Current-voltage characteristics of an individual copper nanowire micropad display ohmic behaviour with a low resistance value of 5.5 mΩ. The nanowires are able to withstand the solder reflow process. Cu nanowire/Sn solder reflow reaction leads to Cu 6Sn5 intermetallic formation. These micropads made of metallic nanowires have the potential for application as chip to substrate interconnects. Nanostructure synthesis is carried out using standard microelectronics fabrication techniques that would enable easy integration of such nanodevices into routine silicon manufacturing. © IOP Publishing Ltd. | |
dc.source | Scopus | |
dc.type | Article | |
dc.contributor.department | PHYSICS | |
dc.description.doi | 10.1088/0957-4484/18/30/305306 | |
dc.description.sourcetitle | Nanotechnology | |
dc.description.volume | 18 | |
dc.description.issue | 30 | |
dc.description.page | - | |
dc.description.coden | NNOTE | |
dc.identifier.isiut | 000247619200006 | |
Appears in Collections: | Staff Publications |
Show simple item record
Files in This Item:
There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.