Please use this identifier to cite or link to this item:
https://scholarbank.nus.edu.sg/handle/10635/92696
DC Field | Value | |
---|---|---|
dc.title | Enhanced cooling of IC chip arrays on printed circuit boards | |
dc.contributor.author | Low, K.W. | |
dc.contributor.author | Yap, C. | |
dc.date.accessioned | 2014-10-16T03:07:31Z | |
dc.date.available | 2014-10-16T03:07:31Z | |
dc.date.issued | 1998 | |
dc.identifier.citation | Low, K.W.,Yap, C. (1998). Enhanced cooling of IC chip arrays on printed circuit boards. Proceedings of the Electronic Packaging Technology Conference, EPTC : 229-235. ScholarBank@NUS Repository. | |
dc.identifier.uri | http://scholarbank.nus.edu.sg/handle/10635/92696 | |
dc.description.abstract | The dissipation of heat generated is a key limiting factor to further miniaturization of electronic circuits. Forced convection cooling of these circuits is an economical and efficient technique used in many applications such as in micro, mini and miniature computers. Enhancement of heat transfer can be achieved using barriers placed over the modules. These barriers act a turbulence promoters and hence enhance the heat transfer, but at the cost of a pressure drop across the barriers. Computations are performed for steady two-dimensional laminar airflow over modules with constant heat flux conditions. The effects on heat dissipation and pressure droop by inserting inverted barriers in various configurations are studied. | |
dc.source | Scopus | |
dc.type | Article | |
dc.contributor.department | MECHANICAL & PRODUCTION ENGINEERING | |
dc.description.sourcetitle | Proceedings of the Electronic Packaging Technology Conference, EPTC | |
dc.description.page | 229-235 | |
dc.description.coden | 313 | |
dc.identifier.isiut | NOT_IN_WOS | |
Appears in Collections: | Staff Publications |
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