Please use this identifier to cite or link to this item: https://doi.org/10.1109/VLSIT.2008.4588603
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dc.titleUnderstanding and prediction of EWF modulation induced by various dopants in the gate stack for a gate-first integration scheme
dc.contributor.authorWang, X.P.
dc.contributor.authorYu, H.Y.
dc.contributor.authorYeo, Y.-C.
dc.contributor.authorLi, M.-F.
dc.contributor.authorChang, S.-Z.
dc.contributor.authorCho, H.-J.
dc.contributor.authorKubicek, S.
dc.contributor.authorWouters, D.
dc.contributor.authorGroeseneken, G.
dc.contributor.authorBiesemans, S.
dc.date.accessioned2014-10-07T04:51:33Z
dc.date.available2014-10-07T04:51:33Z
dc.date.issued2008
dc.identifier.citationWang, X.P., Yu, H.Y., Yeo, Y.-C., Li, M.-F., Chang, S.-Z., Cho, H.-J., Kubicek, S., Wouters, D., Groeseneken, G., Biesemans, S. (2008). Understanding and prediction of EWF modulation induced by various dopants in the gate stack for a gate-first integration scheme. Digest of Technical Papers - Symposium on VLSI Technology : 162-163. ScholarBank@NUS Repository. https://doi.org/10.1109/VLSIT.2008.4588603
dc.identifier.isbn9781424418053
dc.identifier.issn07431562
dc.identifier.urihttp://scholarbank.nus.edu.sg/handle/10635/84339
dc.description.abstractFor the first time, after considering the thermodynamic properties (evaluated by the molar Gibbs energy of oxide formation, Δ OxideG) and the electronegativity (χ) for both the dopants (via ion implantation, thin capping layer or co-deposition) and host materials in the gate stack, a practical model to understand the effective work function (EWF) modulation induced by various dopants is proposed. It is found that the dopant oxide will determine the EWF if the ΔOxideG of dopant (ΔOx-dopG) is more negative than that of host gate oxide (ΔOx-hostG). Or else, χ difference between dopants and host materials will play a more critical role for determining the EWF. This model can serve as a guideline for understanding the EWF modulation by various dopants and to select appropriate gate stack materials for the gate-first technology. © 2008 IEEE.
dc.description.urihttp://libproxy1.nus.edu.sg/login?url=http://dx.doi.org/10.1109/VLSIT.2008.4588603
dc.sourceScopus
dc.typeConference Paper
dc.contributor.departmentELECTRICAL & COMPUTER ENGINEERING
dc.description.doi10.1109/VLSIT.2008.4588603
dc.description.sourcetitleDigest of Technical Papers - Symposium on VLSI Technology
dc.description.page162-163
dc.description.codenDTPTE
dc.identifier.isiut000266975800082
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